IP Library Granted Patent US 9,627,295
Granted Patent B2
US 9,627,295 · App. 15/059,020 · Granted Apr 18, 2017

Devices, systems and methods for manufacturing through-substrate vias and front-side structures

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Quick Facts
Patent No.
US 9,627,295
App. No.
15/059,020
Granted
Apr 18, 2017
Kind
B2
Abstract

Methods of manufacturing semiconductor devices and semiconductor devices with through-substrate vias (TSVs). One embodiment of a method of manufacturing a semiconductor device includes forming an opening through a dielectric structure and at least a portion of a semiconductor substrate, and forming a dielectric liner material having a first portion lining the opening and a second portion on an outer surface of the dielectric structure laterally outside of the opening. The method further includes removing the conductive material such that the second portion of the dielectric liner material is exposed, and forming a damascene conductive line in the second portion of the dielectric liner material that is electrically coupled to the TSV.

Claims (31)

1. A semiconductor device, comprising:

a semiconductor substrate having solid-state feature;

a dielectric structure on the semiconductor substrate;

a conductive contact extending through the dielectric structure and electrically coupled to the solid-state feature;

a through-substrate via (TSV) opening extending through the dielectric structure and at least partially through the semiconductor substrate, wherein the contact is spaced laterally apart from the TSV opening;

a dielectric liner material having a first portion lining the TSV opening and a second portion on an outer surface of the dielectric structure laterally outside of the TSV opening;

a conductive material in the TSV opening defining a TSV spaced laterally apart from the contact; and

a plurality of damascene conductive lines in the dielectric liner material including at least a first damascene conductive line aligned with the TSV and a second damascene conductive line aligned with the contact, wherein the first and second damascene conductive lines extend through the dielectric liner material over the dielectric structure laterally with respect to the TSV and the contact, and

wherein the first and second portions of the dielectric liner material are permanent components of the final device.

2. The semiconductor device of claim 1 wherein the dielectric liner material comprises an undoped oxide.

3. The semiconductor device of claim 1 wherein:

the dielectric liner material comprises an undoped oxide;

the conductive material in the TSV opening comprises copper; and

the second portion of the dielectric liner material has a thickness at least approximately equal to the conductive lines in the dielectric liner material.

4. The semiconductor device of claim 1 wherein the first and second portions of the dielectric liner material are continuous.

5. The semiconductor device of claim 4 wherein the first and second portions of the dielectric liner material are integral with each other.

6. The semiconductor device of claim 1 wherein the conductive lines in the dielectric liner material comprise copper damascene lines.

7. A semiconductor device, comprising:

a semiconductor substrate having solid-state feature;

a dielectric structure on the semiconductor substrate;

a conductive contact through the dielectric structure and electrically coupled to the solid-state feature;

a through-substrate via (TSV) opening having sidewalls extending through the dielectric structure and at least partially through the semiconductor substrate, wherein the contact is spaced laterally apart from the TSV opening;

a continuous liner dielectric material extending over a surface of the dielectric structure laterally outside of the TSV opening and along the sidewalls of the TSV openings, wherein the continuous liner dielectric material has at least one opening laterally separated from the TSV opening and aligned with the conductive contact;

a conductive material in the TSV opening that defines a TSV; and

a conductive material in the opening through the continuous liner that defines a damascene conductive line electrically coupled to the conductive contact, wherein the damascene conductive line extends through the continuous liner over the dielectric structure laterally with respect to the conductive contact.

8. The semiconductor device of claim 7 wherein the dielectric liner material has a first portion lining the TSV opening and a second portion covering the dielectric structure.

9. The semiconductor device of claim 8 wherein the first and second portions of the dielectric liner material comprise a conformal layer of an undoped oxide.

10. The semiconductor device of claim 7 wherein:

the dielectric liner material comprises an undoped oxide;

the conductive material in the TSV opening comprises copper; and

the dielectric liner material extending over the surface of the dielectric structure has a thickness at least approximately equal to the conductive lines in the dielectric liner material.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2016
From: JINDAL, ANURAG; HE, JIAN; VASUDEVAN, LALAPET RANGAN; KIRBY, KYLE K.; LI, HONGQI
To: MICRON TECHNOLOGY, INC.
Reel/Frame 037875/0035 →