Controlling memory cell size in three dimensional nonvolatile memory
View Patent ↗A method is provided that includes forming a vertical bit line disposed in a first direction above a substrate, forming a multi-layer word line disposed in a second direction above the substrate, the second direction perpendicular to the first direction, and forming a memory cell including a nonvolatile memory material at an intersection of the vertical bit line and the multi-layer word line. The multi-layer word line includes a first conductive material layer and a second conductive material layer disposed above the first conductive material layer. The memory cell includes a working cell area encompassed by an intersection of the first conductive material layer and the nonvolatile memory material.
1. A method comprising:
forming a vertical bit line disposed in a first direction above a substrate;
forming a multi-layer word line disposed in a second direction above the substrate, the second direction perpendicular to the first direction; and
forming a memory cell comprising a nonvolatile memory material at an intersection of the vertical bit line and the multi-layer word line,
wherein:
the multi-layer word line comprises a first conductive material layer and a second conductive material layer disposed above the first conductive material layer;
the memory cell comprises a working cell area encompassed by an intersection of the first conductive material layer and the nonvolatile memory material and
the first conductive material layer comprises a first oxidation rate, and the second conductive material layer comprises a second oxidation rate greater than the first oxidation rate.
2. The method of claim 1 , wherein the first conductive material comprises a first height, and the second conductive material comprises a second height greater than the first height.
3. The method of claim 1 , wherein forming the multi-layer word line comprises:
forming the first conductive material layer;
forming the second conductive material layer above the first conductive material layer; and
oxidizing an exposed end of the second conductive material layer.
4. The method of claim 3 , further comprising oxidizing an exposed end of the first conductive material layer.
5. The method of claim 1 , wherein forming the multi-layer word line comprises:
forming the first conductive material layer;
forming the second conductive material layer above the first conductive material layer;
forming a void at an end of the second conductive material layer.
6. The method of claim 5 , further comprising filling the void with a dielectric material.
7. The method of claim 6 , wherein the dielectric material comprises an oxide of the second conductive material layer.
8. The method of claim 1 , wherein the nonvolatile memory material comprises one of a reversible resistance-switching material, a phase change material, and a charge trapping layer.
9. The method of claim 1 , wherein the nonvolatile memory material comprise one or more of HfO 2 , Al 2 O 3 , HfSiO x , HfSiO x N y , HfAlO x , Nb 2 O 5 , Ta 2 O 5 , ZrO 2 , Cr 2 O 3 , Fe 2 O 3 , Ni 2 O 3 , Co 2 O 3 , WO 3 , TiO 2 , SrZrO 3 , SrTiO 3 .
10. The method of claim 1 , wherein forming the multi-layer word line comprises:
forming the first conductive material layer; and
forming the second conductive material layer above the first conductive material layer, the second conductive material layer comprising a first portion and a second portion.
11. The method of claim 10 , wherein forming the second conductive material layer comprises forming the second portion of the second conductive material layer at a tip of the second conductive material layer.
12. The method of claim 10 , wherein the first conductive material layer comprises a first sheet resistance RS 1 , and the first portion of the second conductive material layer has a second sheet resistance RS 2 , with RS 2 <<RS 1 .
13. The method of claim 1 , wherein forming the multi-layer word line comprises:
forming the first conductive material layer, the first conductive material layer comprising a first portion and a second portion; and
forming the second conductive material layer above the first conductive material layer, the second conductive material layer comprising a first portion and a second portion.
14. The method of claim 13 , wherein:
forming the first conductive material layer comprises forming the second portion of the first conductive material layer at a tip of the first conductive material layer; and
forming the second conductive material layer comprises forming the second portion of the second conductive material layer at a tip of the second conductive material layer.
15. The method of claim 13 , wherein:
the second portion of the first conductive material layer comprises an oxide of the first portion of the first conductive material layer; and
the second portion of the second conductive material layer comprises an oxide of the first portion of the second conductive material layer.
16. The method of claim 1 , wherein forming the multi-layer word line comprises:
forming a third conductive material layer, the third conductive material layer comprising a first portion and a second portion;
forming the first conductive material layer above the third conductive material layer, the first conductive material layer comprising a first portion and a second portion; and
forming the second conductive material layer above the first conductive material layer, the second conductive material layer comprising a first portion and a second portion.
17. The method of claim 16 , wherein:
the second portion of the first conductive material layer comprises an oxide of the first portion of the first conductive material layer;
the second portion of the second conductive material layer comprises an oxide of the first portion of the second conductive material layer; and
the second portion of the third conductive material layer comprises an oxide of the first portion of the third conductive material layer.