Semiconductor structure having thermal backside core

1. A semiconductor structure, comprising:

a semiconductor substrate having a recess disposed beneath a semiconductor device, wherein the recess does not extend through the semiconductor substrate;

a thermally conductive core disposed in the recess;

a package substrate comprising a heat sink, wherein the heat sink is in thermal contact with the thermally conductive core; and

a backside ground plane disposed over of the recess.

2. A semiconductor structure as claimed in claim 1 , wherein the semiconductor substrate comprises a first side and a second side, the semiconductor substrate having a first thickness between the semiconductor device and the recess that is less than a second thickness in all other locations between the first side and the second side.

3. A semiconductor structure as claimed in claim 2 , wherein the first thickness is substantially less than the second thickness.

4. A semiconductor structure as claimed in claim 1 , wherein a first side of the thermally conductive core is attached to an upper wall of the recess, and a second side of the thermally conductive core is attached to an upper surface of the heat sink.

5. A semiconductor structure as claimed in claim 1 , wherein the thermally conductive core is attached directly to the backside ground plane.

6. A semiconductor structure as claimed in claim 5 , further comprising a die attach material disposed between a lower surface of the semiconductor substrate and an upper surface of the package substrate.

7. A semiconductor structure as claimed in claim 6 , wherein the die attach material is disposed between a lower surface of the thermally conductive core and the heat sink.

8. A semiconductor structure as claimed in claim 5 , further comprising a die attach material disposed on at least one inner wall of the recess.

9. A semiconductor structure as claimed in claim 1 , wherein the thermally conductive core is attached directly to the heat sink.

10. A semiconductor structure as claimed in claim 9 , further comprising a die attach material disposed between a lower surface of the semiconductor substrate and an upper surface of the package substrate.

11. A semiconductor structure as claimed in claim 9 , further comprising a die attach material disposed on at least one side of the recess.

12. A semiconductor structure as claimed in claim 9 , further comprising a die attach material disposed between an upper surface of the thermally conductive core and an upper surface of the recess.

13. A semiconductor structure as claimed in claim 1 , wherein the semiconductor device comprises a power amplifier comprising the semiconductor substrate, the semiconductor substrate comprising one or more of gallium arsenide (GaAs), indium phosphide (InP), aluminum arsenide (AlAs), or alloys of GaAs, InP, AlAs.

14. A semiconductor structure as claimed in claim 13 , wherein at least one of the semiconductor substrate comprises an active device.

15. A semiconductor structure as claimed in claim 14 , wherein the active device comprises one or more of a metal-semiconductor field effect transistor (MESFET), a high electron mobility transistor (HEMT), a pseudomorphic HEMT, a junction field effect transistor (JFET), and a heterojunction bipolar transistor (HBT).

16. A semiconductor structure as claimed in claim 1 , wherein the semiconductor substrate is electrically insulating.

17. A semiconductor structure as claimed in claim 1 , wherein the semiconductor substrate comprises a material having a comparatively large thermal resistivity.

18. A semiconductor structure as claimed in claim 1 , wherein the recess has a width in a range of approximately 100 μm to approximately 300 μm.

19. A semiconductor structure as claimed in claim 1 , wherein the recess has a width in a range of approximately 100 μm to approximately 1000 μm.

20. A semiconductor structure as claimed in claim 1 , wherein the recess has a width in a range of approximately 100 μm to approximately 300 μm.

21. A semiconductor structure as claimed in claim 1 , wherein the semiconductor substrate has a thickness, and the recess has a depth of approximately 30% to approximately 90% of the thickness of semiconductor substrate.

22. A semiconductor structure as claimed in claim 1 , wherein a portion of the semiconductor substrate in a region between the recess and an upper surface of the semiconductor substrate has a thickness of approximately 70% to approximately 10% of a thickness of the semiconductor substrate.

23. A semiconductor structure as claimed in claim 22 , wherein the thickness of the portion is approximately 20 μm to approximately 20 μm.

24. A semiconductor structure as claimed in claim 22 , wherein the thickness of the portion is approximately 30 μm to approximately 100 μm.

25. A semiconductor structure, comprising:

a semiconductor substrate having a recess disposed beneath a semiconductor device;

a thermally conductive core disposed in the recess;

a package substrate comprising a heat sink, wherein the heat sink is in thermal contact with the thermally conductive core;

a backside ground plane disposed over sidewalls and an upper wall of the recess, wherein sidewalls and an upper wall of the backside ground plane exist over respective sidewalls and an upper wall of the recess; and

die attach material disposed between the backside ground plane and the thermally conductive core on at least two sidewalls of the backside ground plane, but not between the upper wall of the backside ground plane and the thermally conductive core.

26. A semiconductor structure as claimed in claim 25 , wherein a first side of the thermally conductive core is attached to an upper wall of the recess, and a second side of the thermally conductive core is attached to an upper surface of the heat sink.

27. A semiconductor structure as claimed in claim 26 , wherein the die attach material is disposed between a lower surface of the thermally conductive core and the heat sink.

28. A semiconductor structure as claimed in claim 25 , further comprising a die attach material disposed between a lower surface of the semiconductor substrate and an upper surface of the package substrate.

29. A semiconductor structure as claimed in claim 25 , wherein the semiconductor device comprises a power amplifier comprising the semiconductor substrate, the semiconductor substrate comprising one or more of gallium arsenide (GaAs), indium phosphide (InP), aluminum arsenide (AlAs), or alloys of GaAs, InP, AlAs.

30. A semiconductor structure as claimed in claim 29 , wherein at least one of the semiconductor substrate comprises an active device.

31. A semiconductor structure as claimed in claim 30 , wherein the active device comprises one or more of a metal-semiconductor field effect transistor (MESFET), a high electron mobility transistor (HEMT), a pseudomorphic HEMT, a junction field effect transistor (JFET), and a heterojunction bipolar transistor (HBT).

32. A semiconductor structure as claimed in claim 25 , wherein the semiconductor substrate is electrically insulating.

33. A semiconductor structure as claimed in claim 25 , wherein the semiconductor substrate comprises a material having a comparatively large thermal resistivity.

34. A semiconductor structure as claimed in claim 25 , wherein a recess has a width in a range of approximately 100 μm to approximately 300 μm.

35. A semiconductor structure as claimed in claim 25 , wherein the recess has a width in a range of approximately 100 μm to approximately 1000 μm.

36. A semiconductor structure as claimed in claim 25 , wherein the recess has a width in a range of approximately 100 μm to approximately 300 μm.

37. A semiconductor structure as claimed in claim 25 , wherein the semiconductor substrate has a thickness, and the recess has a depth of approximately 30% to approximately 90% of the thickness of semiconductor substrate.

38. A semiconductor structure as claimed in claim 25 , wherein a portion of the semiconductor substrate in a region between the recess and an upper surface of the semiconductor substrate has a thickness of approximately 70% to approximately 10% of a thickness of the semiconductor substrate.

39. A semiconductor structure as claimed in claim 38 , wherein the thickness of the portion is approximately 20 μm to approximately 20 μm.

40. A semiconductor structure as claimed in claim 38 , wherein the thickness of the portion is approximately 30 μm to approximately 100 μm.

41. A semiconductor structure as claimed in claim 1 , wherein the recess comprises, first and second sidewalls on inner surfaces of the recess, and the backside ground plane is disposed over the first and second sidewalls.

42. A semiconductor structure as claimed in claim 1 , wherein the recess comprises an upper inner surface, and the thermally conductive core is in direct contact with a portion of the backside ground plane disposed at the upper inner surface of the recess.

43. A semiconductor structure as claimed in claim 1 , wherein the thermally conductive core is substantially flush with a lower surface of the backside ground plane.

44. A semiconductor structure as claimed in claim 1 , wherein the thermally conductive core has a thickness that is greater than a depth of the recess.

45. A semiconductor structure as claimed in claim 1 , wherein a gap exists between respective sides of the thermally conductive core, and the first and second sidewalls.