Wireless charger using frequency aliasing FSK demodulation
A frequency shift keying (FSK) demodulation component having of a sampler that receives an FSK modulated signal, samples the received FSK modulated signal, and outputs the sampled signal. The FSK demodulation component further includes a low pass filter that filters the sampled signal, and a frequency shift detector that detects shifts in frequency of the low pass filtered sampled signal. The FSK demodulation component then outputs an indication of the detection of shifts in frequency of the low pass filtered sampled signal.
1. A frequency shift keying (FSK) demodulator, comprising:
a sampler that receives an FSK modulated signal, samples the received FSK modulated signal, and outputs the sampled signal, wherein the sampler samples the received FSK modulated signal at a rate defined by a sampling clock signal;
a filter that low pass filters the sampled signal output by the sampler;
a frequency shift detector that detects shifts in frequency of the low pass filtered sampled signal, and outputs an indication of the detection of shifts in frequency of the low pass filtered sampled signal;
a frequency detector that receives the FSK modulated signal, detects the modulation frequency f FSK of the FSK modulated signal, and outputs an indication of the modulation frequency f FSK ; and
a sampling clock generator that dynamically generates the sampling clock signal, wherein the clock generator receives the indication of a modulation frequency f FSK of the FSK modulated signal from the frequency detector, and configures the sampling clock signal to cause the sampler to sample the FSK modulated signal at a frequency f s offset from the modulation frequency f FSK by a defined frequency offset f offset ,
wherein the frequency detector comprises a counter that receives the FSK modulated signal and a clock signal Clk FD , and counts the number of clock cycles of the clock signal Clk FD within a single cycle of the FSK modulated signal, and outputs the count value as the indication of the modulation frequency f FSK of the refined FSK modulated signal to the sampling clock generator.
2. The FSK demodulator of claim 1 , wherein the defined frequency offset f offset comprises a frequency within the frequency range passed by the filter.
3. The FSK demodulator of claim 1 , further comprising a square wave generator that receives a raw FSK signal to be demodulated and converts the received raw FSK signal into a refined FSK modulated square wave signal, and wherein the FSK modulated signal received and sampled by the sampler comprises the refined FSK modulated square wave signal.
4. The FSK demodulator of claim 1 , wherein the FSK demodulator demodulates an FSK modulated RF electrical signal output by a power pick-up unit of a receiver within a wireless power transfer system device.
5. The FSK demodulator of claim 4 , wherein the wireless power transfer system device comprises a Wireless Power Consortium WPC-QI device.
6. An integrated circuit device comprising at least one frequency shift keying (FSK) demodulator component, the FSK demodulation component comprising:
a sampler that receives an FSK modulated signal, samples the received FSK modulated signal at a rate defined by a sampling clock signal, and outputs a sampled signal;
a low pass filter that filters the sampled signal output by the sampler;
a frequency shift detector that detects shifts in frequency of the filtered sampled signal, and outputs an indication of the detection of shifts in frequency of the filtered sampled signal;
a frequency detector that receives the FSK modulated signal, detects the modulation frequency f FSK of the FSK modulated signal, and outputs an indication of the modulation frequency f FSK ; and
a clock generator for generating the sampling clock signal, wherein the clock generator receives an the indication of a modulation frequency f FSK of the FSK modulated signal from the frequency detector, and configures the sampling clock signal to cause the sampler to sample the FSK modulated signal at a frequency f s offset from the modulation frequency f FSK by a defined frequency offset f offset ,
wherein the frequency detector comprises a counter that receives the FSK modulated signal and a clock signal Clk FD , and counts the number of clock cycles of the clock signal Clk FD within a single cycle of the FSK modulated signal, and outputs the count value as the indication of the modulation frequency f FSK of the refined FSK modulated signal to the sampling clock generator.
7. The integrated circuit device of claim 6 , wherein the defined frequency offset f offset comprises a frequency within the frequency range passed by the filter.
8. The integrated circuit device of claim 6 , wherein the FSK demodulator component further comprises a square wave generator that receives a raw FSK signal to be demodulated and converts the received raw FSK signal into a refined FSK modulated square wave signal, and wherein the FSK modulated signal received and sampled by the sampler comprises the refined FSK modulated square wave signal.
9. The integrated circuit device of claim 6 , wherein the FSK demodulator component demodulates an FSK modulated RF electrical signal output of a power pick-up unit of a receiver within a wireless power transfer system device.
10. The integrated circuit device of claim 9 , wherein the wireless power transfer system device comprises a Wireless Power Consortium WPC-QI device.