Phase shift and attenuation circuits for use with multiple-path amplifiers

1. An adjustable power splitter circuit comprising:

a power divider with a power divider input, a first power divider output, and a second power divider output, wherein the power divider is configured to divide a first radio frequency (RF) input signal received at the power divider input into first and second divided RF signals provided at the first and second power divider outputs, and the power divider is further configured to apply one or more fixed phase shifts to the first and second divided RF signals so that the first and second divided RF signals have about a ninety degree phase shift, with respect to each other, at the first and second power divider outputs;

a first circuit comprising a first input coupled to the first power divider output and configured to receive the first divided RF signal, a first output configured to provide a first RF output signal, and a first adjustable phase shifter circuit and a first attenuator circuit series coupled between the first input and the first output, wherein the first adjustable phase shifter circuit and the first attenuator circuit are separate circuits, the first adjustable phase shifter circuit is configured to apply a first phase shift to the first divided RF signal, and the first attenuator circuit is configured to apply a first attenuation to the first divided RF signal;

a second circuit in parallel with the first circuit, the second circuit comprising a second input coupled to the second power divider output and configured to receive the second divided RF signal, a second output configured to provide a second RF output signal, and a second attenuator circuit coupled between the second input and the second output, wherein the second attenuator circuit is a variable attenuator circuit that is configured to apply a second attenuation to the second divided RF signal; and

a controller configured to receive data indicating the first phase shift and the second attenuation, and to control, based on the data, application of the first phase shift by the first adjustable phase shifter circuit, and application of the second attenuation by the second attenuator circuit.

2. The circuit of claim 1 , wherein the first adjustable phase shifter circuit and the second attenuator circuit are separately controllable, and wherein each of the first adjustable phase shifter circuit and the second attenuator circuit is digitally controlled and has a plurality of states.

3. The circuit of claim 1 , wherein the second circuit further comprises a second phase shifter circuit coupled in series with the second attenuator circuit, wherein the second phase shifter circuit and the second attenuator circuit are separate circuits.

4. The circuit of claim 3 , wherein the second phase shifter circuit is an adjustable phase shifter.

5. The circuit of claim 1 , wherein the first attenuator circuit is a variable attenuator circuit that is digitally controlled and has a plurality of states.

6. The circuit of claim 1 , wherein the first attenuator circuit is configured to apply zero decibels of attenuation.

7. The circuit of claim 1 , further comprising:

a third circuit in parallel with the first and second circuits, the third circuit comprising a third input coupled to a third power divider output, a third output, and a third attenuator circuit coupled between the third input and the third output.

8. The circuit of claim 7 , wherein the power divider further comprises:

the third power divider output, wherein the power divider is configured to divide the RF signal received at the power divider input into three RF signals provided at the first, second, and third power divider outputs.

9. The circuit of claim 1 , further comprising:

an interface, wherein the controller is configured to receive the data indicating the first phase shift and the second attenuation to be applied via the interface.

10. The circuit of claim 9 , wherein the interface is selected from a serial interface and a serial peripheral interface.

11. The circuit of claim 9 , wherein the data includes a multiple-bit value that uniquely specifies one of multiple phase shifted states for the first adjustable phase shifter circuit and one of multiple attenuation states for the second attenuator circuit.

12. A Doherty power amplifier comprising:

a main amplifier path;

a peaking amplifier path;

a power divider with a power divider input, a first power divider output, and a second power divider output, wherein the power divider is configured to divide a first radio frequency (RF) input signal received at the power divider input into first and second divided RF signals provided at the first and second power divider outputs, and the power divider is further configured to apply one or more fixed phase shifts to the first and second divided RF signals so that the first and second divided RF signals have about a ninety degree phase shift, with respect to each other, at the first and second power divider outputs;

a first circuit comprising a first input coupled to the first power divider output and configured to receive the first divided RF signal, a first output configured to provide a first RF output signal, and a first adjustable phase shifter circuit and a first attenuator circuit series coupled between the first input and the first output, wherein the first adjustable phase shifter circuit and the first attenuator circuit are separate circuits, the first adjustable phase shifter circuit is configured to apply a first phase shift to the first divided RF signal, and the first attenuator circuit is configured to apply a first attenuation to the first divided RF signal; and

a second circuit in parallel with the first circuit, the second circuit comprising a second input coupled to the second power divider output and configured to receive the second divided RF signal, a second output configured to provide a second RF output signal, and a second attenuator circuit coupled between the second input and the second output, wherein the second attenuator circuit is a variable attenuator circuit that is configured to apply a second attenuation to the second divided RF signal.

13. The amplifier of claim 12 , wherein the first adjustable phase shifter circuit and the second attenuator circuit are separately controllable circuits.

14. The amplifier of claim 12 , further comprising:

a controller configured to receive data indicating the first phase shift and data indicating the second attenuation, and to control, based on the data, application of the first phase shift by the first adjustable phase shifter circuit, and application of the second attenuation by the second attenuator circuit.

15. The amplifier of claim 14 , wherein the controller separately controls the first adjustable phase shifter circuit and the second attenuator circuit.

16. The amplifier of claim 14 , further comprising:

a digital data interface, wherein the controller is configured to receive the data indicating the first phase shift and the data indicating the second attenuation via the interface.

17. The amplifier of claim 14 , wherein:

the first circuit is coupled between the first power divider output and the main amplifier path; and

the second circuit is coupled between the second power divider output and the peaking amplifier path.

18. The amplifier of claim 14 , wherein:

the first circuit is coupled between the first power divider output and the peaking amplifier path; and

the second circuit is coupled between the second power divider output and the main amplifier path.