Configurable mesh data bus in an island-based network flow processor
An island-based network flow processor (IB-NFP) integrated circuit includes rectangular islands disposed in rows. A configurable mesh data bus includes a command mesh, a pull-id mesh, and two data meshes. The configurable mesh data bus extends through all the islands. For each mesh, each island includes a centrally located crossbar switch and eight half links. Two half links extend to ports on the top edge of the island, a half link extends to a port on a right edge of the island, two half links extend to ports on the bottom edge of the island, and a half link extents to a port on the left edge of the island. Two additional links extend to functional circuitry of the island. The configurable mesh data bus is configurable to form a command/push/pull data bus over which multiple transactions can occur simultaneously on different parts of the integrated circuit.
1. An integrated circuit comprising:
a configurable mesh command/push/pull (CPP) data bus, wherein the configurable mesh CPP data bus is coupled to functional circuitry in each of a plurality of islands of the integrated circuit, wherein the islands are disposed in at least three rows, wherein the configurable mesh CPP data bus comprises first links that are oriented to be collinear with respect to one another and extend in a first direction, wherein the configurable mesh CPP data bus comprises second links that are oriented to be collinear with respect to one another and extend in a second direction, wherein the first and second directions are not perpendicular to one another, and wherein the first and second directions are not parallel to one another.
2. An integrated circuit comprising:
a configurable mesh command/push/pull (CPP) data bus, wherein the configurable mesh CPP data bus is coupled to functional circuitry in each of a plurality of islands of the integrated circuit, wherein the islands are disposed in at least three rows, wherein the configurable mesh CPP data bus comprises first links that are oriented to be collinear with respect to one another and extend in a first direction, wherein the configurable mesh CPP data bus comprises second links that are oriented to be collinear with respect to one another and extend in a second direction, wherein the configurable mesh CPP data bus comprises third links that are oriented to be collinear with respect to one another and extend in a third direction, wherein none of the first, second and third directions is perpendicular to another of the first, second and third directions, and wherein none of the first, second and third directions is parallel to another of the first, second and third directions.
3. The integrated circuit of claim 2 , wherein all of the islands of the plurality of islands are rectangular islands of the same shape and the same size.
4. The integrated circuit of claim 2 , wherein the configurable mesh CPP data bus is configured such that a first command can pass from a first island to a second island through a first path and such that a second command can pass from a third island to a fourth island through a second path, wherein the first and second paths are different paths and do not intersect one another, and wherein the first command can travel through the first path at the same time that the second command travels through the second path.
5. The integrated circuit of claim 2 , wherein the integrated circuit is a Network Flow Processor (NFP) and wherein each of the islands is programmable so that the islands work together in parallel to process network data.
6. The integrated circuit of claim 2 , wherein each island comprises a crossbar switch that is a part of the configurable mesh CPP data bus.
7. The integrated circuit of claim 2 , wherein the configurable mesh CPP data bus further comprises a crossbar switch, wherein an end of one of the first links is coupled to the crossbar switch, wherein an end of one of the second links is coupled to the crossbar switch, wherein an end of one of the third links is coupled to the crossbar switch, wherein the crossbar switch is disposed in one of the islands, wherein said one island that comprises the crossbar switch further comprises a functional circuit and an additional link, wherein the additional link couples the functional circuit to the crossbar switch, and wherein the additional link is also a part of the configurable mesh CPP data bus.
8. An integrated circuit comprising:
a plurality of functional circuits, wherein each of the functional circuits is part of a corresponding one of a plurality of rectangular islands of identical shape, wherein some of the rectangular islands are disposed in a first row, wherein others of the rectangular islands are disposed in a second row, and wherein others of the rectangular islands are disposed in a third row; and
means for configurably intercoupling the functional circuits of each of the plurality of rectangular islands to form a configurable mesh data bus, wherein the means couples to the functional circuit of a rectangular island at a central location of said each rectangular island, wherein the configurable mesh data bus is a configurable mesh command/push/pull (CPP) data bus, wherein the means is configurable such that a first command can pass from a first island to a second island through a first path through the means and such that a second command can pass from a third island to a fourth island through a second path through the means, wherein the first and second paths are different paths and do not intersect one another, and wherein the first command can travel through the first path at the same time that the second command travels through the second path, wherein the configurable mesh CPP data bus comprises first links that are oriented to be collinear with respect to one another and extend in a first direction, wherein the configurable mesh CPP data bus comprises second links that are oriented to be collinear with respect to one another and extend in a second direction, wherein the first and second directions are not perpendicular to one another, and wherein the first and second directions are not parallel to one another.
9. A method of fabricating an integrated circuit, comprising:
forming a plurality of islands;
forming functional circuitry in each of the plurality of islands; and
forming a configurable mesh command/push/pull (CPP) data bus, wherein the configurable mesh CPP data bus is coupled to functional circuitry in each of a plurality of islands of the integrated circuit, wherein the islands are disposed in at least three rows, wherein the configurable mesh CPP data bus comprises first links that are oriented to be collinear with respect to one another and extend in a first direction, wherein the configurable mesh CPP data bus comprises second links that are oriented to be collinear with respect to one another and extend in a second direction, wherein the first and second directions are not perpendicular to one another, and wherein the first and second directions are not parallel to one another.
10. A method of fabricating an integrated circuit, comprising:
forming a plurality of islands;
forming functional circuitry in each of the plurality of islands; and
forming a configurable mesh command/push/pull (CPP) data bus, wherein the configurable mesh CPP data bus is coupled to functional circuitry in each of a plurality of islands of the integrated circuit, wherein the islands are disposed in at least three rows, wherein the configurable mesh CPP data bus comprises first links that are oriented to be collinear with respect to one another and extend in a first direction, wherein the configurable mesh CPP data bus comprises second links that are oriented to be collinear with respect to one another and extend in a second direction, wherein the configurable mesh CPP data bus comprises third links that are oriented to be collinear with respect to one another and extend in a third direction, wherein none of the first, second and third directions is perpendicular to another of the first, second and third directions, and wherein none of the first, second and third directions is parallel to another of the first, second and third directions.
11. The method of claim 10 , wherein all of the islands of the plurality of islands are rectangular islands of the same shape and the same size.
12. The method of claim 10 , wherein the configurable mesh CPP data bus is configured such that a first command can pass from a first island to a second island through a first path and such that a second command can pass from a third island to a fourth island through a second path, wherein the first and second paths are different paths and do not intersect one another, and wherein the first command can travel through the first path at the same time that the second command travels through the second path.
13. The method of claim 10 , wherein the integrated circuit is a Network Flow Processor (NFP) and wherein each of the islands is programmable so that the islands work together in parallel to process network data.
14. The method of claim 10 , wherein the forming of the configurable mesh CPP data bus involves forming a crossbar switch on each island that is a part of the configurable mesh CPP data bus.
15. The method of claim 10 , wherein the forming of the configurable mesh CPP data bus involves forming a link on each island that couples to a crossbar switch on the island, wherein the link and the crossbar switch of said each island are parts of the configurable mesh CPP data bus.
16. The integrated circuit of claim 2 , wherein the configurable mesh CPP data bus comprises a command mesh, a pull-id mesh, and a data mesh.
17. The integrated circuit of claim 2 , wherein each link of the first, second and third links comprises two chains of registers, wherein one of the two chains of registers is for communication in a direction, and wherein the other of the two chains of registers is for communication in an opposite direction.
18. The integrated circuit of claim 2 , wherein the integrated circuit has interstitial space between adjacent ones of the islands.
19. The integrated circuit of claim 2 , wherein each link includes two link portions, and wherein each link portion includes two half link portions.
20. The integrated circuit of claim 2 , wherein each link includes two link portions, and wherein each link portion includes two half link portions, and wherein each half link portion includes a chain of registers and a FIFO (First In First Out).