Peaking amplifier frequency tuning

1. A peaking amplifier circuit, comprising:

a first input amplifier having an input connected to an input node and an output connected to a first feedback node;

a second input amplifier having an input connected to the input node and an output connected to a second feedback node;

a capacitor connected between the first feedback node and the second feedback node;

an amplifier having an input connected to the first feedback node and an output connected to an output node;

a tunable feedback amplifier in a negative feedback loop with an input connected to the output node and an output connected to the second feedback node; and

a tuning circuit for varying a transconductance of the tunable feedback amplifier to adjust an operational frequency of the peaking amplifier circuit.

2. The peaking amplifier circuit of claim 1 , wherein the tuning circuit applies a tuning voltage to the tunable feedback amplifier.

3. The peaking amplifier circuit of claim 2 , wherein the tuning circuit applies the tuning voltage to a gate of a tail transistor in the tunable feedback amplifier.

4. The peaking amplifier circuit of claim 1 , further comprising a series arrangement of a capacitor and a load impedance connected from the first feedback node to a source voltage.

5. The peaking amplifier circuit of claim 1 , further comprising a tunable feedback amplifier in a positive feedback loop with an input connected to the output node and an output connected to the second feedback node.

6. The peaking amplifier circuit of claim 1 , wherein the tuning circuit applies a tuning voltage to the tunable feedback amplifier in the positive feedback loop.

7. The peaking amplifier circuit of claim 6 , wherein the tuning circuit applies the tuning voltage to a gate of a tail transistor in the tunable feedback amplifier in the positive feedback loop.

8. The peaking amplifier circuit of claim 2 , wherein the tunable feedback amplifier in the negative feedback loop includes a plurality of tunable feedback amplifier cells, and wherein the tuning circuit selectively activates or deactivates at least one of the tunable feedback amplifier cells.

9. The peaking amplifier circuit of claim 8 , wherein the tuning circuit selectively activates or deactivates at least one of the tunable feedback amplifier cells by applying the tuning voltage to a gate of a tail transistor in at least one of the tunable feedback amplifier cells.

10. The peaking amplifier circuit of claim 1 , further comprising an integrated circuit including the peaking amplifier circuit.

11. A peaking amplifier circuit, comprising:

a first input amplifier having an input connected to an input node and an output connected to a first feedback node;

a second input amplifier having an input connected to the input node and an output connected to a second feedback node;

a first capacitor connected between the first feedback node and the second feedback node;

an amplifier having an input connected to the first feedback node and an output connected to an output node;

a second capacitor and a load impedance in series connected from the first feedback node to a source voltage;

a first tunable feedback amplifier in a negative feedback loop with an input connected to the output node and an output connected to the second feedback node;

a second tunable feedback amplifier in a positive feedback loop with an input connected to the output node and an output connected to the second feedback node; and

a tuning circuit for applying a first tuning voltage to the first tunable feedback amplifier and for applying a second tuning voltage to the second tunable feedback amplifier.

12. The peaking amplifier circuit of claim 11 , wherein the tuning circuit applies the first tuning voltage to a gate of a tail transistor in the first tunable feedback amplifier.

13. The peaking amplifier circuit of claim 11 , wherein the tuning circuit applies the second tuning voltage to a gate of a tail transistor in the second tunable feedback amplifier.

14. The peaking amplifier circuit of claim 11 , wherein the first tunable feedback amplifier includes a plurality of tunable feedback amplifier cells, and wherein the tuning circuit selectively activates or deactivates at least one of the tunable feedback amplifier cells.

15. The peaking amplifier circuit of claim 14 , wherein the tuning circuit selectively activates or deactivates at least one of the tunable feedback amplifier cells by applying the tuning voltage to a gate of a tail transistor in at least one of the tunable feedback amplifier cells.

16. The peaking amplifier circuit of claim 11 , further comprising an integrated circuit including the peaking amplifier circuit.

17. A peaking amplifier circuit, comprising:

a first input amplifier having an input connected to an input node and an output connected to a first feedback node;

a second input amplifier having an input connected to the input node and an output connected to a second feedback node;

a capacitor connected between the first feedback node and the second feedback node;

an amplifier with an input connected to the first feedback node and an output connected to an output node;

a first tunable feedback amplifier with an input connected to the output node and an output connected to the second feedback node;

a second tunable feedback amplifier with an input connected to the output node and an output connected to the second feedback node; and

a tuning circuit for selectively applying a first tuning voltage to the first tunable feedback amplifier and a second tuning voltage to the second tunable feedback amplifier.

18. The peaking amplifier circuit of claim 17 , wherein the first tunable feedback amplifier is in a negative feedback loop.

19. The peaking amplifier circuit of claim 17 , wherein the second tunable feedback amplifier is in a positive feedback loop.

20. The peaking amplifier circuit of claim 17 , further comprising an integrated circuit including the peaking amplifier circuit.