IP Library Granted Patent US 11,021,363
Granted Patent B2
US 11,021,363 · App. 16/440,446 · Granted Jun 1, 2021

Integrating diverse sensors in a single semiconductor device

Inventors: Lianjun Liu (Chandler, AZ); David J. Monk (Mesa, AZ)
Assignee: NXP USA, Inc.
B81B7/007B81C1/00301B81C1/00817G01L9/0042G01L9/0073H01L43/02H01L43/12B81B2201/025
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Quick Facts
Patent No.
US 11,021,363
App. No.
16/440,446
Granted
Jun 1, 2021
Kind
B2
Abstract

In some embodiments a method of manufacturing a sensor system can comprise forming a first structure having a substrate layer and a first sensor that is positioned on a first side of the substrate layer, bonding a cap structure over the first sensor on the first side of the substrate layer, and depositing a first dielectric layer over the cap structure. After bonding the cap structure and depositing the first dielectric layer, a second sensor is fabricated on the first dielectric layer. The second sensor includes material that would be adversely affected at a temperature that is used to bond the cap structure to the first side of the substrate layer.

Claims (46)

1. A multi-sensor device comprising:

a plurality of sensor devices formed over a substrate;

a cap structure bonded over the plurality of sensor devices to form a hermetically sealed cavity around at least one of the plurality of sensor devices;

a first through-silicon via (TSV) in the cap structure adjacent an outer edge of the cap structure;

a first dielectric layer formed over the cap structure;

additional dielectric layers fabricated over the first dielectric layer; and

a magnetic tunnel junction sensor fabricated in the additional dielectric layers.

2. A multi-sensor device as claimed in claim 1 further comprising:

a second TSV in the first and additional dielectric layers, the second TSV is coupled to the first TSV by an interconnect between the cap structure and the first dielectric layer.

3. A multi-sensor device as claimed in claim 1 wherein:

the cap structure includes a dielectric layer and integrated circuitry formed in a wafer.

4. A multi-sensor device as claimed in claim 1 wherein the plurality of sensor devices includes one or more of a group consisting of: a transducer, an inertial sensor, a resonator, a pressure sensor, an accelerometer, a gyroscope, and a microphone.

5. A multi-sensor device as claimed in claim 1 wherein the cap structure is bonded over the plurality of sensor devices.

6. A sensor system comprising:

a first structure having a substrate layer and a first sensor, the first sensor being positioned on a first side of the substrate layer;

a cap structure bonded over the first sensor on the first side of the substrate layer;

a first dielectric layer fabricated over the cap structure;

a magnetic field sensor fabricated on the first dielectric layer after bonding the cap structure and depositing the first dielectric layer.

7. A sensor system as claimed in claim 6 further comprising:

a first through silicon via (TSV) in the cap structure, wherein the first TSV is coupled to conduct signals from the first sensor;

an electrically conductive interconnect on the cap structure, wherein the electrically conductive interconnect is in contact with the first TSV.

8. A sensor system as claimed in claim 7 further comprising additional dielectric layers deposited on the first dielectric layer, wherein the second sensor is formed in the additional dielectric layers.

9. A sensor system as claimed in claim 8 further comprising:

a second TSV in the first dielectric layer and the additional dielectric layers, wherein the second TSV is in contact with the electrically conductive interconnect on the cap structure;

an electrically conductive contact on a top dielectric layer of the additional dielectric layers in contact with the second TSV.

10. A sensor system as claimed in claim 9 wherein the electrically conductive contact on the top dielectric layer of the additional dielectric layers conducts signals from the second sensor.

11. A sensor system as claimed in claim 6 wherein the cap structure forms a hermetically sealed cavity in which the first sensor is located.

12. A sensor system as claimed in claim 6 wherein the first sensor is one of a group consisting of: a microelectromechanical sensor (MEMS), a transducer, an inertial sensor, a resonator, a pressure sensor, an accelerometer, a gyroscope, and a microphone.

13. A sensor system as claimed in claim 7 wherein the conductive interconnect on the cap structure is a part of a redistribution layer.

14. A sensor system as claimed in claim 6 wherein the cap structure includes Application Specific Integrated Circuitry (ASIC) configured to drive the first and/or second sensors.

15. A multi-sensor device comprising:

a micro-electromechanical system (MEMS) sensor;

a cap structure bonded over the MEMS sensor to form a hermetically sealed cavity for the MEMS sensor, wherein the cap structure includes a dielectric layer and integrated circuitry formed in a wafer;

a first through-silicon via (TSV) formed in the cap structure;

a redistribution layer formed on an external surface of the wafer, wherein an interconnect of the redistribution layer is in contact with the first TSV in the cap structure;

an oxide isolation layer deposited over the redistribution layer and portions of the external surface of the wafer that are not covered by the redistribution layer; and

a magnetic field sensor fabricated on the oxide isolation layer.

16. A multi-sensor device as claimed in claim 15 further comprising:

additional oxide isolation layers on the oxide isolation layer formed as the magnetic field sensor is fabricated.

17. A sensor system as claimed in claim 15 further comprising:

the first TSV is coupled to conduct signals from the MEMS sensor;

an electrically conductive interconnect on the cap structure, wherein the electrically conductive interconnect is in contact with the first TSV.

18. A sensor system as claimed in claim 17 further comprising additional oxide layers deposited on the first oxide layer when the magnetic field sensor was formed.

19. A sensor system as claimed in claim 18 further comprising:

a second TSV in the first oxide layer and the additional oxide layers, wherein the second TSV is in contact with the electrically conductive interconnect on the cap structure;

an electrically conductive contact on a top oxide layer of the additional oxide layers in contact with the second TSV.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2024
From: NXP USA, INC.
To: CHIP PACKAGING TECHNOLOGIES, LLC
Reel/Frame 068541/0903 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2019
From: LIU, LIANJUN; MONK, DAVID J.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 049462/0124 →
MERGER AND CHANGE OF NAME Recorded Jun 13, 2019
From: FREESCALE SEMICONDUCTOR, INC.; NXP USA, INC.
To: NXP USA, INC.
Reel/Frame 049462/0287 →
Continuity (2)
Division 14861886 · Sep 22, 2015
Related Publication 20190292042A1 · Sep 26, 2019