IP Library Granted Patent US 10,629,565
Granted Patent B2
US 10,629,565 · App. 16/531,593 · Granted Apr 21, 2020

Semiconductor device and method of forming SIP with electrical component terminals extending out from encapsulant

Inventors: JinHee Jung (Busan, KR); OhHan Kim (In-cheon, KR); InSang Yoon (Seoul, KR)
Assignee: STATS ChipPAC Pte. Ltd.
H01L24/96H01L21/4853H01L21/561H01L21/565H01L23/3107H01L23/3114H01L23/49838H01L23/49861H01L23/552H01L24/13H01L24/16H01L24/81H01L25/50H01L21/568H01L2224/04105H01L2224/12105H01L2224/13111H01L2224/13113H01L2224/13116H01L2224/13124H01L2224/13144H01L2224/13147H01L2224/13155H01L2224/13601H01L2224/16227H01L2224/95001H01L2224/95136H01L2924/1431H01L2924/1433H01L2924/1434H01L2924/181H01L2924/19105H01L2924/3025
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Quick Facts
Patent No.
US 10,629,565
App. No.
16/531,593
Granted
Apr 21, 2020
Kind
B2
Abstract

A semiconductor device has a carrier with an adhesive layer formed over the carrier. Alignment marks are provided for picking and placing the electrical component on the carrier or adhesive layer. An electrical component is disposed on the adhesive layer by pressing terminals of the electrical component into the adhesive layer. The electrical component can be a semiconductor die, discrete component, electronic module, and semiconductor package. A leadframe is disposed over the adhesive layer. A shielding layer is formed over the electrical component. An encapsulant is deposited over the electrical component. The carrier and adhesive layer are removed so that the terminals of the electrical component extend out from the encapsulant for electrical interconnect. A substrate includes a plurality of conductive traces. The semiconductor device is disposed on the substrate with the terminals of the electrical component in contact with the conductive traces.

Claims (39)

1. A semiconductor device, comprising:

a carrier;

an adhesive layer formed over the carrier;

a leadframe disposed over the carrier or adhesive layer;

an electrical component disposed on the adhesive layer within the leadframe with terminals of the electrical component extending at least partially into the adhesive layer; and

an encapsulant deposited over the electrical component.

2. The semiconductor device of claim 1 , wherein the electrical component is selected from the group consisting of a semiconductor die, discrete component, electronic module, and semiconductor package.

3. The semiconductor device of claim 1 , further including a plurality of alignment marks on the carrier or adhesive layer.

4. The semiconductor device of claim 1 , further including a shielding layer formed over the electrical component.

5. The semiconductor device of claim 1 , further including a shielding layer formed over the encapsulant.

6. A semiconductor device, comprising:

a carrier;

a leadframe disposed over the carrier;

an electrical component disposed on the carrier within the leadframe with terminals of the electrical component extending at least partially into the carrier; and

an encapsulant deposited over the electrical component.

7. The semiconductor device of claim 6 , wherein the electrical component is selected from the group consisting of a semiconductor die, discrete component, electronic module, and semiconductor package.

8. The semiconductor device of claim 6 , further including a plurality of alignment marks on the carrier.

9. The semiconductor device of claim 6 , further including a shielding layer formed over the electrical component.

10. The semiconductor device of claim 6 , further including a shielding layer formed over the encapsulant.

11. The semiconductor device of claim 6 , further including an adhesive layer formed over the carrier.

12. A semiconductor device, comprising:

a leadframe;

an electrical component disposed within the leadframe; and

an encapsulant deposited over the electrical component with terminals of the electrical component exposed from the encapsulant.

13. The semiconductor device of claim 12 , wherein the electrical component is selected from the group consisting of a semiconductor die, discrete component, electronic module, and semiconductor package.

14. The semiconductor device of claim 12 , further including:

a carrier; and

an adhesive layer formed over the carrier with terminals of the electrical component extending at least partially into the adhesive layer.

15. The semiconductor device of claim 14 , further including a plurality of alignment marks on the carrier or adhesive layer.

16. The semiconductor device of claim 12 , further including a shielding layer formed over the electrical component or encapsulant.

17. A semiconductor device, comprising:

a leadframe;

an electrical component including a plurality of terminals disposed within the leadframe; and

an encapsulant deposited over the electrical component with the terminals of the electrical component extending from the encapsulant.

18. The semiconductor device of claim 17 , wherein the electrical component is selected from the group consisting of a semiconductor die, discrete component, electronic module, and semiconductor package.

19. The semiconductor device of claim 17 , further including a carrier, wherein the electrical component is disposed on the carrier.

20. The semiconductor device of claim 19 , further including an adhesive layer formed over the carrier with the terminals of the electrical component extending at least partially into the adhesive layer.

21. The semiconductor device of claim 19 , further including a plurality of alignment marks on the carrier.

22. The semiconductor device of claim 17 , further including a shielding layer formed over the electrical component or encapsulant.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
Continuity (3)
Division 15686584 · Aug 25, 2017
Provisional Application 62382005 · Aug 31, 2016
Related Publication 20190355695A1 · Nov 21, 2019