IP Library Granted Patent US 10,770,350
Granted Patent B2
US 10,770,350 · App. 16/715,019 · Granted Sep 8, 2020

Method of separating a back layer on a singulated semiconductor wafer attached to carrier substrate

Inventor: Gordon M. Grivna (Mesa, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L21/78B28D5/0017H01L21/3065H01L21/477H01L21/67092H01L21/67098H01L21/67132H01L21/67144H01L21/6836H01L23/544H01L2221/68327H01L2223/54453Y02P80/30Y10T225/304Y10T225/379Y10T225/386
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Quick Facts
Patent No.
US 10,770,350
App. No.
16/715,019
Granted
Sep 8, 2020
Kind
B2
Abstract

A method for forming an electronic device includes providing a wafer having a plurality of die formed as part of the wafer and separated from each other by spaces. A layer of material is disposed atop a major surface of the wafer and the layer of material is placed adjacent to first carrier substrate comprising a first adhesive layer. The wafer is singulated through the spaces to form singulation lines. A second carrier substrate comprising a second adhesive layer is placed onto an opposite major surface of the wafer. The method includes moving a mechanical device adjacent to and in a direction generally parallel to one of the first carrier substrate or the second carrier substrate to separate the layer of material in the singulation lines. In one example, the second adhesive layer has an adhesive strength that is less than that of the first adhesive layer.

Claims (40)

1. A method of forming an electronic device comprising:

providing a wafer having a plurality of die formed as part of the wafer and separated from each other by spaces, wherein the wafer has a first major surface and a second major surface opposite to the first major surface, and wherein a layer of material is disposed atop the second major surface, and wherein the layer of material is placed onto a first carrier substrate comprising a first adhesive layer;

singulating the wafer through the spaces to form singulation lines without singulating through the layer of material so that portions of the layer of material overlap the singulation lines;

placing a second carrier substrate comprising a second adhesive layer onto the singulated wafer such that the second adhesive layer faces the first carrier substrate and the singulated wafer is interposed between the first carrier substrate and the second carrier substrate; and

moving a roller structure adjacent to and in a direction generally parallel to one of the first carrier substrate or the second carrier substrate to separate the portions of layer of material that overlap singulation lines.

2. The method of claim 1 , wherein:

the second adhesive layer comprises an adhesive strength that is less than that of the first adhesive layer; and

the second adhesive layer extends entirely across the wafer.

3. The method of claim 1 , wherein:

moving the roller structure includes moving the roller structure with both the first carrier substrate and the second carrier substrate attached to the wafer.

4. The method of claim 1 , wherein:

moving the roller structure comprises moving the roller structure against the second carrier substrate while the first carrier substrate is placed adjacent to a compressive material.

5. The method of claim 1 , wherein providing the wafer comprises providing the layer of material comprising a wafer backside coating or die attach film.

6. The method of claim 1 , wherein providing the wafer comprises providing the layer of material comprising a conductive layer.

7. The method of claim 1 , further comprising cooling at least the first carrier substrate during at least a portion of the step of moving the roller structure.

8. A method of forming an electronic device comprising:

providing a wafer having a plurality of die formed on the wafer and separated from each other by spaces, wherein the wafer has a first major surface and a second major surface opposite to the first major surface, and wherein a layer of material is atop the second major surface, and wherein the layer of material is placed adjacent to a first carrier substrate;

singulating the wafer through the spaces to form singulation lines without singulating through the layer of material so that portions of the layer of material overlap the singulation lines;

placing the wafer onto a second carrier substrate, wherein the layer of material is opposite to the second carrier substrate;

moving a roller structure adjacent to and in a direction generally parallel to one of the first carrier substrate or the second carrier substrate to separate the portions of layer of material that overlap singulation lines.

9. The method of claim 8 , wherein placing the wafer onto the first carrier substrate comprises placing the wafer onto a first carrier tape, and wherein placing the wafer onto the second carrier substrate comprising placing the wafer onto a second carrier tape.

10. The method of claim 8 , wherein moving the roller structure includes moving the roller structure with both the first carrier substrate and the second carrier substrate attached to the wafer.

11. The method of claim 8 , wherein moving the roller structure comprises moving the roller structure against the second carrier substrate while the first carrier substrate is placed against a compressive layer.

12. The method of claim 8 , wherein providing the wafer comprises providing the layer of material comprising a wafer backside coating or a die attach film.

13. The method of claim 8 , wherein moving the roller structure comprises moving a wheel structure.

14. A method of singulating a wafer comprising:

providing a wafer having first and second opposing major surfaces, a plurality of die formed as part of the wafer, and a layer of material atop the second major surface, the plurality of die separated by singulation lines that terminate in proximity to the layer of material so that portions of the layer of material overlap the singulation lines, and a first carrier substrate adjoining the layer of material;

placing a substrate adjacent to the first major surface of the wafer such that the wafer is interposed between the first carrier substrate and the substrate;

providing a compressive layer;

providing a roller structure;

placing the wafer in between the compressive layer and the roller structure; and

moving the roller structure in a direction generally parallel to and adjoining one of the first carrier substrate or the substrate to separate the portions of the layer of material that overlap the singulation lines.

15. The method of claim 14 , wherein placing the wafer in between the compressive layer and the roller structure comprises placing the first carrier substrate adjacent to the compressive layer.

16. The method of claim 15 , wherein placing the wafer comprises placing the first carrier substrate so that it physically contacts the compressive layer.

17. The method of claim 14 , wherein providing the wafer comprises providing the layer of material comprising a wafer backside coating or a die attach film.

18. The method of claim 14 , wherein placing the substrate comprises placing a carrier tape.

19. The method of claim 14 further comprising heating at least the first carrier substrate during at least a portion of the step of moving the roller structure.

20. The method of claim 14 further comprising cooling at least the first carrier substrate during at least a portion of the step of moving the roller structure.

21. The method of claim 14 further comprising stretching the first carrier substrate during at least a portion of the step of moving the roller structure.

22. The method of claim 14 , wherein moving the roller structure comprises moving a rotating wheel.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 054090, FRAME 0617 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064081/0167 →
SECURITY INTEREST Recorded Oct 16, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 054090/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2019
From: GRIVNA, GORDON M
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 051290/0341 →
Continuity (9)
Continuation 16352218 · Mar 13, 2019
Continuation 15977608 · May 11, 2018
Continuation 15384646 · Dec 20, 2016
Continuation 14808729 · Jul 24, 2015
Division 14057756 · Oct 18, 2013
Provisional Application 61723548 · Nov 7, 2012
Provisional Application 61750520 · Jan 9, 2013
Provisional Application 61774081 · Mar 7, 2013
Related Publication 20200118878A1 · Apr 16, 2020