Silicon-on-insulator (SOI) substrate and related methods

1. A method of making a plurality of semiconductor die, the method comprising:

forming a ring around a perimeter of a second side of a silicon substrate through backgrinding the second side of the silicon substrate to a desired substrate thickness; and

etching the second side of the silicon substrate after the backgrinding to relieve stress created in the second side of the silicon substrate through the backgrinding; and

depositing an insulative layer onto the second side of the silicon substrate after stress relief etching.

2. The method of claim 1 , further comprising

removing the ring around the perimeter of the second side of the silicon substrate; and

singulating the silicon substrate into the plurality of semiconductor die.

3. The method of claim 1 , wherein the insulative layer is deposited using one of co-evaporation or co-sputtering.

4. The method of claim 1 , further comprising dissipating heat through a heat dissipation device during deposition of the insulative layer.

5. The method of claim 3 , wherein the one of co-evaporation or co-sputtering occur at temperatures that do not require heat dissipation.

6. The method of claim 1 , wherein the desired substrate thickness is less than 35 microns.

7. The method of claim 1 , wherein the insulative layer is deposited directly onto the second side of the silicon substrate after the stress relief etching.

8. The method of claim 1 , further comprising singulating the silicon substrate into a plurality of silicon-on-insulator die.

9. A method of making a plurality of semiconductor die, the method comprising:

backgrinding a second side of a silicon substrate to a desired substrate thickness; and

stress relief etching the second side of the silicon substrate after the backgrinding; and

depositing an insulative layer onto the second side of the silicon substrate after the stress relief etching.

10. The method of claim 9 , further comprising

forming a plurality of semiconductor devices on the first side of the silicon substrate, the first side opposite the second side of the silicon substrate; and

singulating the silicon substrate into a plurality of semiconductor die.

11. The method of claim 9 , wherein the insulative layer is deposited using one of co-evaporation or co-sputtering.

12. The method of claim 9 , further comprising dissipating heat through a heat dissipation device during deposition of the insulative layer.

13. The method of claim 11 , wherein the one of co-evaporation or co-sputtering occur at temperatures that do not require heat dissipation.

14. The method of claim 9 , wherein the desired substrate thickness is less than 35 microns.

15. The method of claim 9 , wherein the insulative layer is deposited directly onto the second side of the silicon substrate after the stress relief etching.

16. The method of claim 9 , wherein the silicon substrate with the insulative layer forms a silicon-on-insulator (SOI) substrate.

17. A method of making a plurality of semiconductor die, the method comprising:

backgrinding a second side of a silicon substrate to a first substrate thickness; and

wet stress relief etching the second side of the silicon substrate after the backgrinding to a second substrate thickness less than 25 microns thick; and

depositing an insulative layer onto the second side of the silicon substrate after the wet stress relief etching.

18. The method of claim 17 , further comprising

forming a plurality of semiconductor devices on a first side of the silicon substrate, the first side opposite the second side of the silicon substrate; and

singulating the silicon substrate into the plurality of semiconductor die.

19. The method of claim 17 , wherein the insulative layer is deposited directly onto the second side of the silicon substrate after the wet stress relief etching.

20. The method of claim 17 , wherein the silicon substrate with the insulative layer forms a silicon-on-insulator (SOI) substrate.