IP Library › Assignment 064615/0602
Patent Assignment
Reel/Frame 064615/0602

RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 054523, FRAME 0378

Recorded: 2023-08-16 Received: 2023-08-16 Pages: 24
Assignor
Assignee
SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
5005 EAST MCDOWELL ROAD, MAILDROP A700, PHOENIX, AZ, 85008, UNITED STATES
Covered Applications (75)
NON-VOLATILE MEMORY READING CIRCUITS AND METHODS FOR REDUCING SENSING DELAY PERIODS
App. No. 17/037,948
→
MULTI-LINK RANGE EXTENSION
App. No. 17/038,013
→
SYSTEMS AND METHODS FOR SYSTEM OPTIMIZATION AND/OR FAILURE DETECTION
App. No. 17/038,583
→
IMAGE SENSOR AMPLIFIERS WITH REDUCED INTER-CIRCULATION CURRENTS
App. No. 16/948,724
→
INDUCTIVE POSITION SENSOR WITH INTEGRATED FAULT DETECTION
App. No. 17/035,983
→
BEAMFORMER SOLICITED SOUNDING
App. No. 17/037,313
→
PLASMA-SINGULATED, CONTAMINANT-REDUCED SEMICONDUCTOR DIE
App. No. 16/948,709
→
WIDE BANDGAP WAFER BACKSIDE CAPPED BY A DETECTION FACILITATING LAYER
App. No. 16/948,665
→
PARTIAL ZERO VOLTAGE SWITCHING (ZVS) FOR FLYBACK POWER CONVERTER AND METHOD THEREFOR
App. No. 17/034,938
→
CIRCUIT AND METHOD FOR CONTROLLING A CRYSTAL OSCILLATOR
App. No. 16/948,617
→
PLASMA DIE SINGULATION SYSTEMS AND RELATED METHODS
App. No. 17/031,539
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GLOBAL SHUTTER SENSOR SYSTEMS AND RELATED METHODS
App. No. 17/029,682
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Electronic Device Including a High Electron Mobility Transistor Including a Gate Electrode and a Gate Interconnect and a Method of Using the Same
App. No. 16/948,517
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FAST CHIRP SYNTHESIS VIA SEGMENTED FREQUENCY SHIFTING
App. No. 17/027,913
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SEMICONDUCTOR DEVICES WITH DISSIMLAR MATERIALS AND METHODS
App. No. 16/948,491
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MULTI-LINK WIRELESS COMMUNICATIONS CONNECTIONS
App. No. 17/027,455
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SYSTEMS AND METHODS OF SYNCHRONOUS RECTIFICATION IN ACTIVE CLAMP FLYBACK POWER CONVERTERS
App. No. 16/948,417
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BANDGAP REFERENCE CIRCUIT
App. No. 16/948,415
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POTENTIOSTAT WITH OFFSET CALIBRATION
App. No. 16/948,409
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FEEDBACK AND RETRANSMISSION FORMAT OF HARQ PROTOCOL
App. No. 17/022,366
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LIDAR SYSTEM WITH DYNAMIC RESOLUTION
App. No. 16/948,380
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REDUCING OR ELIMINATING TRANSDUCER REVERBERATION
App. No. 17/021,775
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SEMICONDUCTOR DEVICES WITH SINGLE-PHOTON AVALANCHE DIODES AND HYBRID ISOLATION STRUCTURES
App. No. 16/948,325
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INTEGRATED CIRCUIT MODULE FOR CIRCUIT BREAKERS, RELAYS AND CONTACTORS
App. No. 17/019,799
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TUNABLE TERAHERTZ DETECTOR
App. No. 16/948,285
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MULTI-STAGE ANALOG TO DIGITAL CONVERTER
App. No. 16/948,288
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SYSTEMS WITH ADC CIRCUITRY AND ASSOCIATED METHODS
App. No. 16/948,283
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RECEIVED SIGNAL EQUALIZATION OF WIRELESS TRANSMISSIONS
App. No. 17/017,191
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SYSTEM AND METHOD FOR CONTROLLING A LOW-DROPOUT REGULATOR
App. No. 16/948,265
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SYSTEMS WITH ADC CIRCUITRY AND ASSOCIATED METHODS
App. No. 16/948,274
→
ELECTRONIC DEVICE INCLUDING A CHARGE STORAGE COMPONENT
App. No. 17/016,682
→
SEMICONDUCTOR DEVICE INCLUDING A LEADFRAME
App. No. 17/017,089
→
IMAGING SYSTEMS WITH SINGLE-PHOTON AVALANCHE DIODES AND AMBIENT LIGHT LEVEL DETECTION
App. No. 16/948,269
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Electronic Device Including Doped Regions and a Trench Between the Doped Regions
App. No. 17/016,708
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LATERALLY DIFFUSED METAL-OXIDE-SEMICONDUCTOR (LDMOS) TRANSISTORS
App. No. 16/948,215
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SEMICONDUCTOR SUBSTRATE PRODUCTION SYSTEMS AND RELATED METHODS
App. No. 17/014,890
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SCATTERING STRUCTURES FOR SINGLE-PHOTON AVALANCHE DIODES
App. No. 16/948,100
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Semiconductor Devices with Single-Photon Avalanche Diodes and Light Scattering Structures with Different Densities
App. No. 16/948,105
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METHOD OF FORMING A SEMICONDUCTOR DEVICE
App. No. 17/011,027
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PHASE SHIFTER SELF-TEST
App. No. 17/011,075
→
SPLIT-STEER AMPLIFIER WITH INVERTIBLE OUTPUT
App. No. 17/011,106
→
VOLTAGE THRESHOLD SENSING SYSTEMS AND RELATED METHODS
App. No. 17/008,266
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REDUCED VOLTAGE SWITCHING OF A MAIN SWITCH IN FLYBACK POWER CONVERTERS
App. No. 16/947,995
→
METHODS AND APPARATUS FOR VARIABLE CAPACITANCE DETECTION
App. No. 16/947,978
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IMAGING SYSTEMS WITH ADJUSTABLE AMPLIFIER CIRCUITRY
App. No. 16/947,604
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HIGH-ELECTRON-MOBILITY TRANSISTOR (HEMT) SEMICONDUCTOR DEVICES WITH REDUCED DYNAMIC RESISTANCE
App. No. 16/947,593
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INSULATED GATED FIELD EFFECT TRANSISTOR STRUCTURE HAVING SHIELDED SOURCE AND METHOD
App. No. 16/947,586
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FAULT DETECTION CIRCUIT AND RELATED METHODS
App. No. 16/988,128
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BEAMFORMING PERFORMANCE OPTIMIZATION
App. No. 16/987,572
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METHODS AND SYSTEM FOR A RESETTABLE FLIP FLOP
App. No. 16/947,562
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BACKSIDE WAFER ALIGNMENT METHODS
App. No. 16/987,236
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LATERAL DMOS DEVICE WITH STEP-PROFILED RESURF AND DRIFT STRUCTURES
App. No. 16/947,564
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SEMICONDUCTOR PACKAGES WITH DIE INCLUDING CAVITIES AND RELATED METHODS
App. No. 16/985,995
→
LEADLESS SEMICONDUCTOR PACKAGES, LEADFRAMES THEREFOR, AND METHODS OF MAKING
App. No. 16/984,758
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THIN SEMICONDUCTOR PACKAGE FOR NOTCHED SEMICONDUCTOR DIE
App. No. 16/942,916
→
THINNED SEMICONDUCTOR PACKAGE AND RELATED METHODS
App. No. 16/941,231
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LEADFRAME WITH SOCKETS FOR SOLDERLESS PINS
App. No. 16/947,317
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SUBSTRATE INTEGRATED WAVEGUIDE AND METHOD FOR MANUFACTURING THE SAME
App. No. 16/947,275
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METHODS OF MANUFACTURE FOR TRENCH-GATE INSULATED-GATE BIPOLAR TRANSISTORS (IGBTs)
App. No. 16/947,085
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VOLTAGE CLAMPING CIRCUIT
App. No. 16/947,051
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METHODS AND SYSTEM FOR AN INTEGRATED CIRCUIT
App. No. 16/947,050
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CONFIGURABLE PIXEL READOUT CIRCUIT FOR IMAGING AND TIME OF FLIGHT MEASUREMENTS
App. No. 16/947,017
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BONDED SEMICONDUCTOR PACKAGE AND RELATED METHODS
App. No. 16/929,335
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SILICON-ON-INSULATOR (SOI) SUBSTRATE AND RELATED METHODS
App. No. 16/929,397
→
IMAGING SYSTEMS WITH IMPROVED CIRCUITRY TO PROVIDE BOOSTED CONTROL SIGNALS
App. No. 16/947,012
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DIE CLEANING SYSTEMS AND RELATED METHODS
App. No. 16/929,542
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SOI SUBSTRATE AND RELATED METHODS
App. No. 16/929,378
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MONOLITHIC SEMICONDUCTOR DEVICE ASSEMBLIES
App. No. 62/705,758
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TERMINATION STRUCTURES FOR TRENCH-GATE FIELD-EFFECT TRANSISTORS
App. No. 62/705,646
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ADAPTIVE GATE DRIVER
App. No. 16/946,755
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MULTI-CHIP PACKAGING STRUCTURE FOR AN IMAGE SENSOR
App. No. 16/946,768
→
WIRELESS TRANSCEIVER
App. No. 16/918,574
→
METHOD OF FORMING A SEMICONDUCTOR DEVICE
App. No. 63/047,037
→
Process of Forming an Electronic Device Including a Junction Field-Effect Transistor Having a Gate Within a Well Region
App. No. 16/946,703
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SEMICONDUCTOR PACKAGE WITH ELASTIC COUPLER AND RELATED METHODS
App. No. 16/396,904
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