Laterally diffused metal-oxide-semiconductor (LDMOS) transistors

1. A laterally diffused metal-oxide-semiconductor (LDMOS) transistor, comprising:

a substrate of a first conductivity type;

a buried well region of a second conductivity type disposed in the substrate, the second conductivity type being opposite the first conductivity type;

a body region of the first conductivity type, the body region being disposed on the buried well region;

a drift region of the second conductivity type, the drift region being disposed in the body region;

a drain implant of the second conductivity type, the drain implant being disposed in the drift region;

a source implant of the second conductivity type, the source implant being disposed in the body region;

a gate structure disposed on the drift region, the gate structure including:

a field plate including a RESURF dielectric layer;

a gate dielectric layer; and

a gate electrode disposed on the field plate and the gate dielectric layer; and

a drain contact extending through the field plate and defining an Ohmic contact with the drain implant.

2. The LDMOS transistor of claim 1 , wherein:

the first conductivity type is p-type; and

the second conductivity type is n-type.

3. The LDMOS transistor of claim 1 , wherein:

the first conductivity type is n-type; and

the second conductivity type is p-type.

4. The LDMOS transistor of claim 1 , wherein the body region includes:

a buried body region disposed on the buried well region;

a surface body region; and

a linking body region disposed between the buried body region and the surface body region.

5. The LDMOS transistor of claim 1 , wherein:

the RESURF dielectric layer includes:

a first thermal oxide layer disposed on the drift region and the drain implant; and

a deposited oxide layer disposed on the first thermal oxide layer; and

the gate dielectric layer includes a second thermal oxide layer.

6. The LDMOS transistor of claim 1 , further comprising a heavy body implant of the first conductivity type disposed in the body region, the heavy body implant being adjacent to the source implant.

7. The LDMOS transistor of claim 6 , further comprising a shallow trench isolation dielectric disposed in the body region, the shallow trench isolation dielectric being adjacent to the heavy body implant.

8. The LDMOS transistor of claim 6 , further comprising a source contact defining an Ohmic contact with the source implant, the body region and the heavy body implant.

9. The LDMOS transistor of claim 1 , wherein the RESURF dielectric layer is disposed on an accumulation region of the LDMOS transistor.

10. The LDMOS transistor of claim 1 , wherein the RESURF dielectric layer includes a sloped portion extending from an upper surface of the RESURF dielectric layer to the gate dielectric layer.

11. The LDMOS transistor of claim 1 , further comprising a linking implant of the second conductivity type, the linking implant being disposed in the body region.

12. The LDMOS transistor of claim 1 , wherein the drain implant is shared between a first segment of the LDMOS transistor and a second segment of the LDMOS transistor.

13. A laterally diffused metal-oxide-semiconductor (LDMOS) transistor, comprising:

a substrate of a first conductivity type;

a buried well region of a second conductivity type, the second conductivity type being opposite the first conductivity type;

a body region of the first conductivity type, the body region being disposed on the buried well region;

a drift region of the second conductivity type, the drift region being disposed in the body region;

a drain implant of the second conductivity type, the drain implant being disposed in the drift region;

a first source implant of the second conductivity type disposed in the body region, the first source implant defining a source region of a first segment of the LDMOS transistor;

a second source implant of the second conductivity type disposed in the body region, the second source implant defining a source region of a second segment of the LDMOS transistor;

a gate structure disposed on the drift region, the gate structure including:

a field plate including a RESURF dielectric layer;

a gate dielectric layer; and

a gate electrode disposed on the field plate and the gate dielectric layer, the gate electrode including a first gate electrode portion of the first segment of the LDMOS transistor and a second gate electrode portion of the second segment of the LDMOS transistor; and

a drain contact extending through the field plate between the first gate electrode portion the second gate electrode portion, the drain contact and the drain implant being shared between the first segment of the LDMOS transistor and the second segment of the LDMOS transistor.

14. The LDMOS transistor of claim 13 , further comprising:

a first source contact to the first source implant; and

a second source contact to the second source implant.

15. The LDMOS transistor of claim 14 , wherein:

the drain contact includes a first silicide material; and

the first source contact and the second source contact include a second silicide material that is different than the first silicide material.

16. The LDMOS transistor of claim 13 , wherein the RESURF dielectric layer is disposed on respective accumulation regions of the first segment of the LDMOS transistor and the second segment of the LDMOS transistor.

17. A method for forming a laterally diffused metal-oxide-semiconductor (LDMOS) transistor, the method comprising:

forming, in a substrate of a first conductivity type, a buried well region of a second conductivity type, the second conductivity type being opposite the first conductivity type;

forming, in the substrate on the buried well region, a deep body region of the first conductivity type;

forming a drift region of the second conductivity type on the deep body region;

forming a gate structure on the drift region, the gate structure including:

a field plate including a RESURF dielectric layer;

a gate dielectric layer; and

a gate electrode disposed on the field plate and the gate dielectric layer;

forming, in the drift region:

a surface body region of the first conductivity type; and

a linking body region of the first conductivity type, the linking body region being disposed between the surface body region and the deep body region;

forming a drain implant of the second conductivity type in the drift region;

forming a source implant of the second conductivity type in the surface body region; and

forming a drain contact extending through the field plate, the drain contact defining an ohmic contact with the drain implant.

18. The method of claim 17 , wherein forming the source implant and the drain implant includes:

forming the source implant using a first implant energy and a second implant energy, the second implant energy being greater than the first implant energy; and

forming the drain implant through the field plate using the second implant energy.

19. The method of claim 17 , further comprising, prior to forming the buried well region, forming shallow trench isolation regions of the LDMOS transistor.

20. The method of claim 17 , further comprising, prior to forming the drain implant and the source implant, forming a linking implant of the second conductivity type, the linking implant being disposed in the surface body region.