REDUCED VOLTAGE SWITCHING OF A MAIN SWITCH IN FLYBACK POWER CONVERTERS
Reduced voltage switching of a main switch in flyback power converters. At least some example embodiments are methods including: storing energy in a field associated with a secondary winding of a transformer, the secondary winding arranged for flyback operation within a secondary circuit of the power converter; charging a capacitor coupled to an auxiliary winding of the transformer; discharging the energy in the field associated with the secondary winding to provide an output voltage of the power converter; and when the electrical current flowing through the secondary winding reaches a predetermined low level reducing voltage across a main switch in a primary circuit of the power converter by coupling the capacitor to the auxiliary winding to create a voltage on a primary winding of the transformer.
1 . A primary controller for a power converter, comprising:
a main gate terminal configured to couple to a gate of a main field effect transistor (FET);
an auxiliary driver circuit, the auxiliary driver circuit defining a charging gate output and a resonance gate output, the charging gate output configured to couple to a charge control FET, and the resonance gate output configured to couple to a resonance FET;
wherein the primary controller is configured to, during each switching cycle of the main FET:
assert the main gate terminal;
assert the charging gate output during periods of time when the main gate terminal is asserted; and
assert the resonance gate output during periods of time when the main gate terminal is de-asserted.
2 . The primary controller of claim 1 further comprising:
a switch node terminal configured to couple to a switch node of the power converter;
and wherein the primary controller is configured to assert the resonance gate output based on a voltage sensed on the switch node terminal.
3 . The primary controller of claim 2 wherein the primary controller is configured to assert the resonance gate output when voltage sensed on the switch node terminal indicates a current through a secondary winding of the power converter has ceased.
4 . The primary controller of claim 1 wherein the primary controller is configured to assert the resonance gate output a predetermined period of time after the primary controller senses that secondary current has ceased.
5 . The primary controller of claim 1 further comprising:
the charge control FET disposed within the primary controller and defining a gate, a drain, and a source, the gate of the charge control FET coupled to the charging gate output, and the drain coupled to a first switch terminal; and
the resonance FET disposed within the primary controller and defining a gate, a drain, and a source, the gate of the resonance FET coupled to the resonance gate output, and the drain of the resonance FET coupled to a second switch terminal.
6 . The primary controller of claim 5 wherein the auxiliary driver circuit is configured to:
assert the charging gate output during periods of time when the main gate terminal is asserted;
monitor voltage on the second switch terminal; and
de-assert the charging gate output when the voltage on the second switch terminal rises to predetermined voltage.