IP Library Granted Patent US 11,075,103
Granted Patent B2
US 11,075,103 · App. 16/987,236 · Granted Jul 27, 2021

Backside wafer alignment methods

Inventors: Michael J. Seddon (Gilbert, AZ); Takashi Noma (Ota, JP)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L21/681H01L21/76871H01L21/78
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Quick Facts
Patent No.
US 11,075,103
App. No.
16/987,236
Granted
Jul 27, 2021
Kind
B2
Abstract

Implementations of a method for wafer alignment may include: providing a wafer having a first side and a second side and forming a seed layer on a second side of the wafer. The method may include applying a glop to the seed layer at two or more predetermined points and plating a metal layer over the seed layer and around the glop. The method may include removing the glop to expose the seed layer and etching the seed layer to expose a plurality of alignment features on the second side of the wafer.

Claims (32)

1. A method for wafer alignment, the method comprising:

providing a wafer comprising a first side and a second side;

applying a glop to the second side at two or more predetermined points;

forming a metal layer over the second side and around the glop; and

removing the glop to expose the second side.

2. The method of claim 1 , further comprising using a plurality of alignment features to align the wafer for singulation.

3. The method of claim 1 , wherein applying the glop further comprises using one of a stencil, a motor controlled dispenser, or a spray coater.

4. The method of claim 1 , wherein the metal layer comprises one of gold, copper, nickel, or any combination thereof.

5. The method of claim 1 , wherein the glop comprises, photoresist, resin, or polymeric material.

6. A method for wafer alignment, the method comprising:

providing a wafer comprising one or more die streets on a first side of the wafer, the wafer comprising a second side;

applying a glop to an area of the second side of the wafer corresponding with the one or more die streets on the first side of the wafer;

forming a metal layer on the second side; and

removing the glop to expose the area of the second side corresponding with the one or more die streets, the one or more die streets each comprising a plurality of alignment features therein.

7. The method of claim 6 , further comprising:

aligning the wafer using an infrared camera; and

singulating the wafer into a plurality of die.

8. The method of claim 6 , wherein applying the glop further comprises using one of a stencil, a motor controlled dispenser, or a spray coater.

9. The method of claim 6 , wherein the metal layer comprises one of gold, copper, nickel, or any combination thereof.

10. The method of claim 6 , wherein the glop comprises, photoresist, resin, or polymeric material.

11. A method for wafer alignment, the method comprising:

providing a wafer comprising a first side and a second side;

applying a glop to the second side at two or more predetermined points;

forming a metal layer over the second side and around the glop; and

removing the glop to expose the second side thereby exposing a plurality of alignment features in the wafer.

12. The method of claim 11 , further comprising:

aligning the wafer using an infrared camera; and

singulating the wafer into a plurality of die.

13. The method of claim 11 , wherein applying the glop further comprises using one of a stencil, a motor controlled dispenser, or a spray coater.

14. The method of claim 11 , wherein the metal layer comprises one of gold, copper, nickel, or any combination thereof.

15. The method of claim 11 , wherein the glop comprises, photoresist, resin, or polymeric material.

16. The method of claim 11 , wherein the metal layer comprises one of metal, oxides, or polymeric materials.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 054523, FRAME 0378 Recorded Aug 16, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064615/0602 →
SECURITY INTEREST Recorded Nov 25, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 054523/0378 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 7, 2020
From: SEDDON, MICHAEL J.; NOMA, TAKASHI
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 053428/0852 →
Continuity (3)
Continuation 16505967 · Jul 9, 2019
Provisional Application 62796680 · Jan 25, 2019
Related Publication 20200365440A1 · Nov 19, 2020