IP Library Granted Patent US 11,355,580
Granted Patent B2
US 11,355,580 · App. 16/947,564 · Granted Jun 7, 2022

Lateral DMOS device with step-profiled RESURF and drift structures

Inventors: Thierry Coffi Herve Yao (Portland, OR); Richard De Souza (Happy Valley, OR); Troy Darwin Clear (Boring, OR)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L29/0634H01L21/0415H01L29/66681H01L29/7816H01L51/0011
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Quick Facts
Patent No.
US 11,355,580
App. No.
16/947,564
Granted
Jun 7, 2022
Kind
B2
Abstract

A method for fabricating a MOSFET includes forming a source region and a drain region on a surface of a semiconductor substrate, forming a gate region, forming a body diffusion region, forming metal structures, and forming a drift region including an n-type drift structure having a stepped dopant concentration profile with dopant concentrations increasing along a lateral direction from the drain region to the source region of the device.

Claims (28)

1. A lateral MOSFET, comprising:

a substrate;

a source;

a gate;

a drain; and

a drift region extending from the source to the drain, the drift region including a drift structure including a series of overlapping diffused-dopant regions having a stepped dopant concentration profile with dopant concentrations increasing along a lateral direction from the drain to the source.

2. The lateral MOSFET of claim 1 , wherein a number of overlapping diffused-dopant regions in the series of overlapping diffused-dopant regions in the drift structure is equal to two.

3. The lateral MOSFET of claim 1 , wherein the series of overlapping diffused-dopant regions includes a number of diffused-dopant regions extending to decreasing depths along the lateral direction from the drain to the source.

4. The lateral MOSFET of claim 3 , wherein the series of overlapping diffused-dopant regions includes at least two overlapping diffused-dopant regions.

5. The lateral MOSFET of claim 1 , further comprising:

a reduced surface field (RESURF) structure disposed below the drift structure in the drift region, the RESURF structure including a plurality of resurf diffused-dopant regions formed along the lateral direction from the drain to the source.

6. The lateral MOSFET of claim 5 , wherein each of the plurality of resurf diffused-dopant regions in the RESURF structure is at a respective depth in the substrate, and wherein the depths of the plurality of resurf diffused-dopant regions in the RESURF structure decrease along the lateral direction from the drain to the source.

7. The lateral MOSFET of claim 5 , wherein each of the plurality of resurf diffused-dopant regions in the RESURF structure have a respective dopant concentration, and wherein the dopant concentrations of the plurality of resurf diffused-dopant regions in the RESURF structure increase in steps along the lateral direction from the drain to the source.

8. The lateral MOSFET of claim 5 , wherein the plurality of resurf diffused-dopant regions in the RESURF structure includes at least two resurf diffused-dopant regions in the RESURF structure.

9. The lateral MOSFET of claim 5 , wherein each of the series of overlapping diffused-dopant regions in the drift structure has a width in the lateral direction, and is associated with one of the plurality of resurf diffused-dopant regions in the RESURF structure having a same width in the lateral direction.

10. The lateral MOSFET of claim 5 , wherein each of the series of overlapping diffused-dopant regions in the drift structure has a width in the lateral direction, and is associated with one of the plurality of resurf diffused-dopant regions in the RESURF structure, and wherein at least one of the overlapping diffused-dopant regions in the drift structure and an associated resurf diffused-dopant region in the RESURF structure have different widths in a lateral direction.

11. The lateral MOSFET of claim 5 , wherein at least one of the overlapping diffused-dopant regions in the series of overlapping diffused-dopant regions in the drift structure is not associated with any resurf diffused-dopant region in the RESURF structure.

12. The lateral MOSFET of claim 1 , further comprising a reduced surface field oxide layer disposed on a surface of the substrate below a gate of the MOSFET.

13. The lateral MOSFET of claim 5 , wherein the series of diffused-dopant regions in the drift structure have a first dopant type, and wherein the plurality of resurf diffused-dopant regions in the RESURF structure have a second dopant type opposite to the first dopant type.

14. A device comprising:

a source; a source body, a gate, and a drain formed along a surface of a semiconductor substrate; and

a drift region including a number of overlapping doped semiconductor regions having a stepped dopant concentration profile with dopant concentrations of a first dopant type increasing in steps along a lateral direction from the drain to the source of the device.

15. The device of claim 14 further comprising a reduced surface field oxide layer disposed on the surface of the semiconductor substrate below the gate.

16. The device of claim 14 , wherein the number of overlapping doped semiconductor regions having a stepped dopant concentration profile include two or more lightly doped diffused-dopant regions having implanted dopants.

17. The device of claim 16 , wherein the dopant concentrations in the two or more lightly doped diffused-dopant regions increase in steps in a horizontal direction from an edge of the drain to the source body in the device.

18. The device of claim 16 , wherein the implanted dopants are n-type dopants.

19. The device of claim 14 , further comprising: a reduced surface field (RESURF) structure having a stepped dopant concentration profile with dopant concentrations of a second dopant type increasing along a lateral direction from the drain to the source of the device.

20. The device of claim 19 , wherein the RESURF structure includes one or more lightly doped diffused-dopant regions of the second dopant type confined to a region deeper than the number of overlapping doped semiconductor regions of the first dopant type.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 054523, FRAME 0378 Recorded Aug 16, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064615/0602 →
SECURITY INTEREST Recorded Nov 25, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 054523/0378 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2020
From: YAO, THIERRY COFFI HERVE; DE SOUZA, RICHARD; CLEAR, TROY DARWIN
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 053422/0607 →
Continuity (2)
Provisional Application 62923087 · Oct 18, 2019
Related Publication 20210118987A1 · Apr 22, 2021