IP Library Granted Patent US 11,342,278
Granted Patent B2
US 11,342,278 · App. 17/008,997 · Granted May 24, 2022

EMI shielding for flip chip package with exposed die backside

Inventors: SungWon Cho (Seoul, KR); ChangOh Kim (Incheon, KR); Il Kwon Shim (Singapore, SG); InSang Yoon (Seoul, KR); KyoungHee Park (Seoul, KR)
Assignee: STATS ChipPAC Pte. Ltd.
H01L23/552H01L23/3107H01L23/36H01L23/367H01L23/49816H01L23/50H01L23/5225H01L23/562H01L23/60H01L24/26H01L27/0248H01L2924/181
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Quick Facts
Patent No.
US 11,342,278
App. No.
17/008,997
Granted
May 24, 2022
Kind
B2
Abstract

A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die.

Claims (47)

1. A semiconductor device, comprising:

a semiconductor die;

an encapsulant deposited over the semiconductor die;

a first shielding layer formed on the semiconductor die;

a second shielding layer formed on a side surface of the semiconductor die between the encapsulant and the semiconductor die; and

a solder layer formed over the first shielding layer.

2. The semiconductor device of claim 1 , wherein the semiconductor die is electrically connected to the first shielding layer.

3. The semiconductor device of claim 1 , wherein the first shielding layer physically contacts the semiconductor die.

4. The semiconductor device of claim 3 , wherein the first shielding layer includes a stainless steel layer that physically contacts the semiconductor die.

5. The semiconductor device of claim 1 , further including a heatsink disposed over the solder layer.

6. A semiconductor device, comprising:

a semiconductor die;

an encapsulant deposited over the semiconductor die, wherein a surface of the semiconductor die is coplanar to a surface of the encapsulant;

a first shielding layer formed over the semiconductor die and encapsulant, wherein a portion of the surface of the encapsulant is exposed from the first shielding layer; and

a solder layer formed over the first shielding layer.

7. The semiconductor device of claim 6 , wherein the first shielding layer includes a plurality of layers.

8. The semiconductor device of claim 6 , wherein a surface of the semiconductor die is coplanar with a surface of the encapsulant.

9. The semiconductor device of claim 8 , wherein the first shielding layer is formed directly on the surface of the semiconductor die and the surface of the encapsulant.

10. The semiconductor device of claim 6 , further including a heatsink disposed over the solder layer.

11. The semiconductor device of claim 10 , wherein the heatsink is bonded to the first shielding layer by the solder layer.

12. The semiconductor device of claim 6 , further including a second shielding layer formed between the semiconductor die and encapsulant.

13. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die with the semiconductor die exposed from the encapsulant;

forming a first shielding layer over the semiconductor die and encapsulant;forming a second shielding layer on the semiconductor die prior to depositing the encapsulant and

depositing a solder layer over the first shielding layer.

14. The method of claim 13 , further including depositing the solder layer by:

forming a mask on the first shielding layer;

depositing the solder layer on the first shielding layer after forming the mask;

removing the mask after depositing the solder layer; and

reflowing the solder layer after removing the mask.

15. The method of claim 14 , further including:

forming a plurality of openings in the mask; and

depositing the solder layer into the openings of the mask.

16. The method of claim 13 , further including forming a second shielding layer on the semiconductor die prior to depositing the encapsulant.

17. The method of claim 13 , further including bonding a heatsink to the first shielding layer using the solder layer.

18. The method of claim 13 , further including forming the first shielding layer directly on the semiconductor die.

19. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die;

forming a first shielding layer over the semiconductor die and encapsulant;

removing a portion of the first shielding layer outside a footprint of the semiconductor die; and

depositing a solder layer over the first shielding layer.

20. The method of claim 19 , further including forming the first shielding layer directly on the semiconductor die.

21. The method of claim 19 , further including forming the first shielding layer as a plurality of layers.

22. The method of claim 19 , further including forming a second shielding layer on the semiconductor die prior to depositing the encapsulant.

23. The method of claim 22 , further including forming the first shielding layer physically contacting the second shielding layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2020
From: CHO, SUNGWON; KIM, CHANGOH; SHIM, IL KWON; YOON, INSANG; PARK, KYOUNGHEE
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 053658/0231 →
Continuity (3)
Continuation 16529486 · Aug 1, 2019
Provisional Application 62717415 · Aug 10, 2018
Related Publication 20200395312A1 · Dec 17, 2020