IP Library Granted Patent US 11,595,038
Granted Patent B2
US 11,595,038 · App. 17/256,642 · Granted Feb 28, 2023

Control system, switch system, power converter, method for controlling bidirectional switch element, and program

Inventors: Yusuke Kinoshita (Kyoto, JP); Yasuhiro Yamada (Tokyo, JP); Hidekazu Umeda (Osaka, JP)
Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
H03K17/56H01L29/2003H01L29/205H01L29/7786H02M7/537
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Quick Facts
Patent No.
US 11,595,038
App. No.
17/256,642
Granted
Feb 28, 2023
Kind
B2
Abstract

A control system includes a control unit. When turning a bidirectional switch element ON, the control unit controls the bidirectional switch element to cause a time lag between a first timing and a second timing. The first timing is a timing when a voltage equal to or higher than a threshold voltage is applied to one gate electrode selected from a first gate electrode and a second gate electrode. The one gate electrode is associated with one source electrode selected from a first source electrode and a second source electrode and having a lower potential than the other source electrode. The second timing is a timing when a voltage equal to or higher than a threshold voltage is applied to the other gate electrode associated with the other source electrode having a higher potential than the one source electrode.

Claims (48)

1. A control system for controlling a bidirectional switch element, the bidirectional switch element comprising:

a substrate;

a first nitride semiconductor layer formed over the substrate;

a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a larger bandgap than the first nitride semiconductor layer;

a first source electrode, a first gate electrode, a second gate electrode, and a second source electrode, all of which are formed over the second nitride semiconductor layer;

a first p-type nitride semiconductor layer interposed between the first gate electrode and the second nitride semiconductor layer; and

a second p-type nitride semiconductor layer interposed between the second gate electrode and the second nitride semiconductor layer,

the control system including a control unit,

the substrate being electrically insulated from each of the first source electrode, the second source electrode, the first gate electrode, and the second gate electrode,

the substrate of the bidirectional switch element electrically floating,

the control unit being configured to, when turning the bidirectional switch element ON, control the bidirectional switch element to cause a time lag between a first timing and a second timing,

the first timing being a timing when a voltage equal to or higher than a threshold voltage is applied to one gate electrode selected from a group consisting of the first gate electrode and the second gate electrode, the one gate electrode being associated with one source electrode selected from the group consisting of the first source electrode and the second source electrode and having a lower potential than the other source electrode, the second timing being a timing when a voltage equal to or higher than a threshold voltage is applied to the other gate electrode associated with the other source electrode having a higher potential than the one source electrode.

2. The control system of claim 1 , wherein

the control unit is configured to make the bidirectional switch element operate as a diode in an interval between the first timing and the second timing, and

when operating as the diode, the bidirectional switch element causes a current to flow from one source electrode selected from the group consisting of the first source electrode and the second source electrode and having the higher potential than the other source electrode to the other source electrode having the lower potential than the one source electrode without causing a current to flow from the other source electrode having the lower potential to the one source electrode having the higher potential.

3. The control system of claim 1 , wherein the time lag is equal to or longer than 50 nanoseconds.

4. The control system of claim 1 , wherein the control unit includes a delay circuit configured to cause the time lag.

5. The control system of claim 1 , wherein the control unit is configured to, when turning the bidirectional switch element OFF, prevent the bidirectional switch element from operating as a diode.

6. A switch system comprising:

the control system of claim 1 ; and

the bidirectional switch element.

7. A power converter comprising:

a power converting unit for performing power conversion; and

the switch system of claim 6 ,

wherein the power converting unit includes the bidirectional switch element.

8. A method for controlling a bidirectional switch element, the bidirectional switch element comprising:

a substrate;

a first nitride semiconductor layer formed over the substrate;

a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a larger bandgap than the first nitride semiconductor layer;

a first source electrode, a first gate electrode, a second gate electrode, and a second source electrode, all of which are formed over the second nitride semiconductor layer;

a first p-type nitride semiconductor layer interposed between the first gate electrode and the second nitride semiconductor layer; and

a second p-type nitride semiconductor layer interposed between the second gate electrode and the second nitride semiconductor layer,

the substrate being electrically insulated from each of the first source electrode, the second source electrode, the first gate electrode, and the second gate electrode,

the substrate of the bidirectional switch element electrically floating,

the method including controlling, when turning the bidirectional switch element ON, the bidirectional switch element to cause a time lag between a first timing and a second timing,

the first timing being a timing when a voltage equal to or higher than a threshold voltage is applied to one gate electrode selected from a group consisting of the first gate electrode and the second gate electrode, the one gate electrode being associated with one source electrode selected from the group consisting of the first source electrode and the second source electrode and having a lower potential than the other source electrode, the second timing being a timing when a voltage equal to or higher than a threshold voltage is applied to the other gate electrode associated with the other source electrode having a higher potential than the one source electrode.

9. A non-transitory storage medium storing a program designed to cause a computer system to perform delay processing,

the computer system being configured to control a bidirectional switch element, the bidirectional switch element including:

a substrate;

a first nitride semiconductor layer formed over the substrate;

a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a larger bandgap than the first nitride semiconductor layer;

a first source electrode, a first gate electrode, a second gate electrode, and a second source electrode, all of which are formed over the second nitride semiconductor layer;

a first p-type nitride semiconductor layer interposed between the first gate electrode and the second nitride semiconductor layer; and

a second p-type nitride semiconductor layer interposed between the second gate electrode and the second nitride semiconductor layer,

the substrate being electrically insulated from each of the first source electrode, the second source electrode, the first gate electrode, and the second gate electrode,

the substrate of the bidirectional switch element electrically floating,

the delay processing including causing, when turning the bidirectional switch element ON, a time lag between a first timing and a second timing,

the first timing being a timing when a voltage equal to or higher than a threshold voltage is applied to one gate electrode selected from a group consisting of the first gate electrode and the second gate electrode, the one gate electrode being associated with one source electrode selected from the group consisting of the first source electrode and the second source electrode and having a lower potential than the other source electrode, the second timing being a timing when a voltage equal to or higher than a threshold voltage is applied to the other gate electrode associated with the other source electrode having a higher potential than the one source electrode.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2025
From: INFINEON TECHNOLOGIES AUSTRIA AG
To: PANASONIC HOLDINGS CORPORATION
Reel/Frame 072853/0508 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2024
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC HOLDINGS CORPORATION
Reel/Frame 069503/0625 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2021
From: KINOSHITA, YUSUKE; YAMADA, YASUHIRO; UMEDA, HIDEKAZU
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056971/0934 →
Priority Claims (1)
JP JP2018-125451 · Jun 29, 2018 · national
Continuity (1)
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