IP Library Granted Patent US 11,581,233
Granted Patent B2
US 11,581,233 · App. 17/307,795 · Granted Feb 14, 2023

Semiconductor device and method of forming electrical circuit pattern within encapsulant of SIP module

Inventors: JinHee Jung (Incheon, KR); ChangOh Kim (Incheon, KR)
Assignee: STATS ChipPAC Pte. Ltd.
H01L23/31H01L21/565H01L23/60H01L23/66
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Quick Facts
Patent No.
US 11,581,233
App. No.
17/307,795
Granted
Feb 14, 2023
Kind
B2
Abstract

A semiconductor device has an electronic component assembly with a substrate and a plurality of electrical components disposed over the substrate. A conductive post is formed over the substrate. A molding compound sheet is disposed over the electrical component assembly. A carrier including a first electrical circuit pattern is disposed over the molding compound sheet. The carrier is pressed against the molding compound sheet to dispose a first encapsulant over and around the electrical component assembly and embed the first electrical circuit pattern in the first encapsulant. A shielding layer can be formed over the electrical components assembly. The carrier is removed to expose the first electrical circuit pattern. A second encapsulant is deposited over the first encapsulant and the first electrical circuit pattern. A second electrical circuit pattern is formed over the second encapsulant. A semiconductor package is disposed over the first electrical circuit pattern.

Claims (57)

1. A method of making a semiconductor device, comprising:

providing an electrical component assembly;

forming a conductive post in contact with the electrical component assembly;

disposing a molding compound sheet over the electrical component assembly after forming the conductive post in contact with the electrical component assembly;

disposing a carrier including a first electrical circuit pattern over the molding compound sheet; and

pressing the carrier against the molding compound sheet to dispose a first encapsulant over and around the electrical component assembly and embed the first electrical circuit pattern in the first encapsulant.

2. The method of claim 1 , further including removing the carrier to expose the first electrical circuit pattern.

3. The method of claim 2 , further including

disposing a second encapsulant over the first encapsulant and the first electrical circuit pattern; and

forming a second electrical circuit pattern over the second encapsulant.

4. The method of claim 1 , further including forming a shielding layer over the electrical component assembly.

5. The method of claim 1 , wherein providing the electronic component assembly includes:

providing a substrate; and

disposing a plurality of electrical components over the substrate.

6. The method of claim 1 , further including removing a portion of the first encapsulant to expose the conductive post.

7. A method of making a semiconductor device, comprising:

providing a substrate;

forming a conductive post in contact with the substrate;

disposing a molding compound sheet over the substrate after forming the conductive post in contact with the substrate;

disposing a carrier including a first electrical circuit pattern over the molding compound sheet; and

pressing the carrier against the molding compound sheet to dispose a first encapsulant over the substrate and embed the first electrical circuit pattern in the first encapsulant.

8. The method of claim 7 , further including disposing a plurality of electrical components over the substrate to form an electrical component assembly.

9. The method of claim 8 , further including forming a shielding layer over the electrical component assembly.

10. The method of claim 7 , further including removing the carrier to expose the first electrical circuit pattern.

11. The method of claim 10 , further including

disposing a second encapsulant over the first encapsulant and the first electrical circuit pattern; and

forming a second electrical circuit pattern over the second encapsulant.

12. The method of claim 7 , further including removing a portion of the first encapsulant to expose the conductive post.

13. The method of claim 7 , further including disposing a semiconductor package over the first electrical circuit pattern.

14. A method of making a semiconductor device, comprising:

providing an electrical component assembly;

forming a conductive post over the electrical component assembly;

disposing a molding compound sheet over the electrical component assembly after forming the conductive post over the electrical component assembly;

disposing a first electrical circuit pattern over the molding compound sheet; and

pressing the first electrical circuit pattern into the molding compound sheet to dispose a first encapsulant over and around the electrical component assembly and embed the first electrical circuit pattern in the first encapsulant.

15. The method of claim 14 , further including

disposing a second encapsulant over the first encapsulant and the first electrical circuit pattern; and

forming a second electrical circuit pattern over the second encapsulant.

16. The method of claim 14 , further including forming a shielding layer over the electrical component assembly.

17. The method of claim 14 , wherein providing the electronic component assembly includes:

providing a substrate; and

disposing a plurality of electrical components over the substrate.

18. The method of claim 14 , further including removing a portion of the first encapsulant to expose the conductive post.

19. The method of claim 14 , further including disposing a semiconductor package over the first electrical circuit pattern.

20. A method of making a semiconductor device, comprising:

providing a substrate;

forming a conductive post over the substrate;

disposing a molding compound sheet over the substrate after forming the conductive post over the substrate;

disposing a first electrical circuit pattern over the molding compound sheet; and

pressing the first electrical circuit pattern into the molding compound sheet to dispose a first encapsulant over the substrate and embed the first electrical circuit pattern in the first encapsulant.

21. The method of claim 20 , further including disposing a plurality of electrical components over the substrate to form an electrical component assembly.

22. The method of claim 21 , further including forming a shielding layer over the electrical component assembly.

23. The method of claim 20 , further including:

disposing a second encapsulant over the first encapsulant and the first electrical circuit pattern; and

forming a second electrical circuit pattern over the second encapsulant.

24. The method of claim 20 , further including removing a portion of the first encapsulant to expose the conductive post.

25. The method of claim 20 , further including disposing a semiconductor package over the first electrical circuit pattern.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2021
From: JUNG, JINHEE; KIM, CHANGOH
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 056141/0081 →
Continuity (1)
Related Publication 20220359321A1 · Nov 10, 2022