IP Library Granted Patent US 11,276,424
Granted Patent B2
US 11,276,424 · App. 17/361,496 · Granted Mar 15, 2022

Data storage devices with integrated slider voltage potential control

Inventors: John Contreras (Palo Alto, CA); Yunfei Ding (Fremont, CA); Kuok San Ho (Redwood City, CA); Ian Robson McFadyen (San Jose, CA); Joey Martin Poss (Rochester, MN)
Assignee: Western Digital Technologies, Inc.
G11B5/3929G11B5/012G11B5/314G11B5/3912G11B2005/0024
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Quick Facts
Patent No.
US 11,276,424
App. No.
17/361,496
Granted
Mar 15, 2022
Kind
B2
Abstract

Disclosed herein is a data storage device comprising a slider comprising an embedded contact sensor, an electronics module, and a plurality of lines disposed between and coupled to the slider and the electronics module, wherein at least one line of the plurality of lines is configured to both (a) couple a slider bias voltage to a body of the slider to control a potential of the slider, and (b) provide a signal to the embedded contact sensor. The slider may also include a shunt circuit for mitigating radio-frequency interference by shunting it to ground. The slider may include a write element, which may include a write-field enhancement structure. The slider may include a read element for reading from a recording media.

Claims (38)

1. A data storage device, comprising:

a slider comprising an embedded contact sensor;

an electronics module; and

a plurality of lines disposed between and coupled to the slider and the electronics module,

wherein at least one line of the plurality of lines is configured to both (a) couple a slider bias voltage to a body of the slider to control a potential of the slider, and (b) provide a signal to the embedded contact sensor.

2. The data storage device recited in claim 1 , further comprising circuitry configured to mitigate radio-frequency interference, and wherein the at least one line of the plurality of lines is coupled to the circuitry.

3. The data storage device recited in claim 1 , further comprising a flexure disposed between the electronics module and the slider, the flexure comprising:

a support layer;

an insulator layer;

a conductor layer; and

a cover layer,

and wherein the plurality of lines is in the conductor layer.

4. The data storage device recited in claim 1 , wherein the slider further comprises a write head, and wherein a subset of lines of the plurality of lines is configured to provide a write current to the write head to record data to a recording media.

5. The data storage device recited in claim 4 , wherein the write head includes a write-field enhancement structure.

6. The data storage device recited in claim 5 , wherein the write-field enhancement structure comprises a spin-torque oscillator or a DC field generation (DFG) layer.

7. The data storage device recited in claim 1 , further comprising:

at least one resistance disposed between a slider body connection and the embedded contact sensor.

8. The data storage device recited in claim 7 , wherein a value of a first resistance of the at least one resistance is approximately 18 kOhms.

9. The data storage device recited in claim 7 , wherein the slider further comprises a shunt circuit disposed between a slider body connection and ground.

10. The data storage device recited in claim 9 , wherein the shunt circuit comprises:

a first branch comprising a first resistance; and

a second branch comprising a capacitance,

wherein the first branch and the second branch are connected in parallel.

11. The data storage device recited in claim 10 , wherein a value of the first resistance is approximately 750 kOhms, and a value of the capacitance is greater than or equal to about 40 pF.

12. The data storage device recited in claim 10 , wherein the shunt circuit is configured to shunt radio-frequency interference (RFI) signals above a specified cutoff frequency to ground.

13. The data storage device recited in claim 9 , wherein the slider further comprises a read element, and wherein the shunt circuit is configured to reduce radio-frequency interference (RFI) signals affecting the read element.

14. The data storage device recited in claim 13 , further comprising a resistance connected in parallel between a first read line connected to the read element and a second read line connected to the read element.

15. The data storage device recited in claim 14 , further comprising:

a second resistance between the first read line and ground; and

a third resistance between the second read line and ground.

16. The data storage device recited in claim 15 , wherein a value of the second resistance or the third resistance is approximately 15 kOhms, and a value of the first resistance is approximately 2 kOhms.

17. The data storage device recited in claim 1 , further comprising a shunt circuit disposed between a slider body connection and ground.

18. The data storage device recited in claim 17 , wherein the shunt circuit comprises:

a first branch comprising a first resistance; and

a second branch comprising a capacitance,

wherein the first branch and the second branch are connected in parallel.

19. The data storage device recited in claim 18 , wherein a value of the first resistance is approximately 750 kOhms, and a value of the capacitance is greater than or equal to about 40 pF.

20. The data storage device recited in claim 17 , wherein the slider further comprises a read element, and wherein the shunt circuit is configured to reduce radio-frequency interference (RFI) signals affecting the read element.

Assignments (5)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 057651 FRAME 0296 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058981/0958 →
SECURITY INTEREST Recorded Sep 17, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 057651/0296 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2021
From: CONTRERAS, JOHN; DING, YUNFEI; HO, KUOK SAN; MCFADYEN, IAN; POSS, JOEY MARTIN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 056850/0657 →
Continuity (3)
Division 16833942 · Mar 30, 2020
Provisional Application 62843187 · May 3, 2019
Related Publication 20210327462A1 · Oct 21, 2021