Semiconductor device and method of making a photonic semiconductor package
A semiconductor device has an interposer. A first semiconductor die with a photonic portion is disposed over the interposer. The photonic portion extends outside a footprint of the interposer. The interposer and first semiconductor die are disposed over a substrate. An encapsulant is deposited between the interposer and substrate. The photonic portion remains exposed from the encapsulant.
1. A method of making a semiconductor device, comprising:
providing an interposer;
disposing a first semiconductor die over the interposer with a portion of the first semiconductor die extending over a fourth edge of the interposer and outside a footprint of the interposer;
disposing a first PCB unit over the interposer adjacent to a first edge of the first semiconductor die and between the first edge of the first semiconductor die and a first edge of the interposer in plan view;
disposing a second PCB unit over the interposer adjacent to a second edge of the first semiconductor die and between the second edge of the first semiconductor die and a second edge of the interposer in plan view, wherein the second edge of the first semiconductor die is perpendicular to the first edge of the first semiconductor die;
disposing a third PCB unit over the interposer adjacent to a third edge of the first semiconductor die and between the third edge of the first semiconductor die and a third edge of the interposer in plan view, wherein the first semiconductor die is directly between the first PCB unit and third PCB unit;
disposing the interposer and first semiconductor die over a substrate with the first semiconductor die, first PCB unit, second PCB unit, and third PCB unit between the interposer and substrate;
disposing a first solder bump between the interposer and first PCB unit; and
disposing a second solder bump between the first PCB unit and substrate.
2. The method of claim 1 , further including forming a notch in the portion of the first semiconductor die.
3. The method of claim 1 , further including disposing a second semiconductor die over the interposer opposite the first semiconductor die.
4. The method of claim 1 , further including disposing a solder bump over the substrate opposite the first semiconductor die.
5. A semiconductor device, comprising:
an interposer;
a first discrete passive component disposed on a first surface of the interposer;
a first portion of solder extending from the first discrete passive component to a first contact pad of the interposer;
a second discrete passive component disposed on a second surface of the interposer;
a second portion of solder extending from the second discrete passive component to a second contact pad of the interposer;
a first semiconductor die disposed over the first surface of the interposer with a photonic portion of the first semiconductor die extending outside a footprint of the interposer;
a second semiconductor die disposed over the second surface of the interposer;
a substrate disposed with the first semiconductor die between the interposer and substrate;
a first PCB unit disposed between the substrate and interposer adjacent to a first edge of the first semiconductor die and between the first edge of the first semiconductor die and a first edge of the interposer in plan view, wherein the first discrete passive component is physically directly between the first PCB unit and the first semiconductor die;
a second PCB unit disposed between the substrate and interposer adjacent to a second edge of the first semiconductor die and between the second edge of the first semiconductor die and a second edge of the interposer in plan view, wherein the second edge of the first semiconductor die is perpendicular to the first edge of the first semiconductor die;
a third PCB unit disposed between the substrate and interposer adjacent to a third edge of the first semiconductor die and between the third edge of the first semiconductor die and a third edge of the interposer in plan view, wherein the first semiconductor die is directly between the first PCB unit and third PCB unit; and
an encapsulant deposited between the interposer and substrate, wherein the encapsulant covers a first portion of a first surface of the first semiconductor die while a second portion of the first surface including the photonic portion remains exposed from the encapsulant.
6. The semiconductor device of claim 5 , further including:
a transmit notch formed in the photonic portion of the first semiconductor die; and
a receive notch formed in the photonic portion of the first semiconductor die, wherein a first size of the receive notch is different from a second size of the transmit notch.
7. The semiconductor device of claim 5 , further including:
a first gap between the first semiconductor die and first PCB unit;
a second gap between the first semiconductor die and second PCB unit; and
a third gap between the first semiconductor die and third PCB unit.
8. The semiconductor device of claim 7 , further including:
a fourth gap between the first PCB unit and second PCB unit; and
a fifth gap between the second PCB unit and third PCB unit.
9. A semiconductor device, comprising:
an interposer;
a first semiconductor die disposed over the interposer with a portion of the first semiconductor die extending over a fourth edge of the interposer and outside a footprint of the interposer;
a first PCB unit disposed over the interposer adjacent to a first edge of the first semiconductor die and between the first edge of the first semiconductor die and a first edge of the interposer in plan view;
a second PCB unit disposed over the interposer adjacent to a second edge of the first semiconductor die and between the second edge of the first semiconductor die and a second edge of the interposer in plan view, wherein the second edge of the first semiconductor die is perpendicular to the first edge of the first semiconductor die;
a third PCB unit disposed over the interposer adjacent to a third edge of the first semiconductor die and between the third edge of the first semiconductor die and a third edge of the interposer in plan view, wherein the first semiconductor die is directly between the first PCB unit and third PCB unit;
a substrate disposed with the first semiconductor die, first PCB unit, second PCB unit, and third PCB unit between the interposer and substrate;
a first solder bump disposed between the interposer and first PCB unit; and
a second solder bump disposed between the first PCB unit and substrate.
10. The semiconductor device of claim 9 , further including a notch formed in the portion of the first semiconductor die.
11. The semiconductor device of claim 9 , further including a second semiconductor die disposed over the interposer opposite the first semiconductor die.
12. The semiconductor device of claim 9 , further including:
a first gap between the first semiconductor die and first PCB unit;
a second gap between the first semiconductor die and second PCB unit; and
a third gap between the first semiconductor die and third PCB unit.
13. The semiconductor device of claim 12 , further including:
a fourth gap between the first PCB unit and second PCB unit; and
a fifth gap between the second PCB unit and third PCB unit.