Antenna-in-package devices and methods of making
A semiconductor device has a PCB with an antenna and a semiconductor package mounted onto the PCB. An epoxy molding compound bump is formed or disposed over the PCB opposite the semiconductor package. A first shielding layer is formed over the PCB. A second shielding layer is formed over the semiconductor package. A board-to-board (B2B) connector is disposed on the PCB or as part of the semiconductor package. A conductive bump is disposed between the semiconductor package and PCB.
1. A method of making a semiconductor device, comprising:
providing a PCB including an antenna formed on a first surface of the PCB;
providing a semiconductor package, including,
a substrate,
an encapsulant deposited over the substrate, and
a shielding layer completely covering a top surface of the encapsulant opposite the substrate and all side surfaces of the semiconductor package, wherein the shielding layer is connected to a ground node through a conductive layer of the substrate;
mounting the semiconductor package onto a second surface of the PCB opposite the first surface; and
disposing an epoxy molding compound (EMC) bump on the first surface of the PCB over the antenna, wherein the EMC bump is electrically insulating.
2. The method of claim 1 , wherein the EMC bump is molded onto the PCB.
3. The method of claim 1 , further including forming a second shielding layer over the PCB.
4. The method of claim 1 , further including mounting a board-to-board (B2B) connector to the PCB.
5. The method of claim 1 , wherein the semiconductor package includes a board-to-board (B2B) connector.
6. The method of claim 1 , further including disposing a conductive bump between the semiconductor package and PCB.
7. A method of making a semiconductor device, comprising:
providing an antenna PCB, wherein the antenna PCB includes a PCB and an antenna formed as part of a conductive layer directly on or in a first surface of the PCB;
disposing a semiconductor package over a second surface of the antenna PCB opposite the first surface, wherein the semiconductor package includes,
a substrate,
a first semiconductor die mounted onto a first surface of the substrate,
a first encapsulant deposited over the first surface of the substrate with the first semiconductor die embedded in the first encapsulant,
a second semiconductor die mounted onto a second surface of the substrate,
a second encapsulant deposited over the second surface of the substrate with the second semiconductor die embedded in the second encapsulant,
a solder bump extending through the first encapsulant to the antenna PCB, and
a shielding layer completely covering a top surface of the first encapsulant opposite the substrate and all side surfaces of the semiconductor package, wherein the shielding layer is connected to a ground node through a conductive layer of the substrate; and
forming a plurality of polymer bumps on the first surface of the antenna PCB, wherein the polymer bumps are electrically insulating.
8. The method of claim 7 , further including:
disposing a mask over the antenna PCB;
forming a shielding layer over the antenna PCB and mask; and
removing the mask.
9. The method of claim 7 , further including disposing a board-to-board (B2B) connector over the antenna PCB, wherein the B2B connector is coupled to the semiconductor package through the antenna PCB.
10. The method of claim 7 , wherein the semiconductor package includes a double-sided SiP module.
11. The method of claim 7 , wherein the polymer bumps include a high dielectric constant.
12. The method of claim 7 , further including disposing the solder bump between the antenna PCB and the substrate of the semiconductor package.
13. The method of claim 7 , wherein the antenna PCB is devoid of electrical components except for the antenna and a conductive path to couple the antenna to the semiconductor package.
14. The method of claim 7 , further including forming the plurality of polymer bumps directly on the antenna.
15. A semiconductor device, comprising:
a PCB including an antenna;
a semiconductor package mounted onto the PCB, wherein the semiconductor package includes,
a substrate,
a semiconductor die mounted onto a first surface of the substrate,
a first encapsulant deposited over the first surface of the substrate,
a solder bump extending through the encapsulant from the substrate to the PCB,
a second encapsulant deposited over a second surface of the substrate opposite the first surface, and
a shielding layer completely covering a top surface of the encapsulant opposite the substrate and all side surfaces of the semiconductor package, wherein the shielding layer is connected to a ground node through a conductive layer of the substrate; and
a plurality of polymer bumps formed on a surface of the antenna PCB opposite the semiconductor package, wherein the polymer bumps are electrically insulating.
16. The semiconductor device of claim 15 , further including a second shielding layer formed over the PCB.
17. The semiconductor device of claim 15 , further including a board-to-board (B2B) connector mounted to the PCB.
18. The semiconductor device of claim 15 , further including a board-to-board (B2B) connector disposed on the semiconductor package.
19. A semiconductor device, comprising:
an antenna PCB including an antenna formed as part of a conductive layer directly on or in a first surface of the antenna PCB;
a board-to-board (B2B) connector mounted onto the antenna PCB;
a semiconductor package disposed over a second surface of the antenna PCB, wherein the B2B connector is coupled to the semiconductor package through the antenna PCB;
a shielding layer completely covering a top surface and all side surfaces of the semiconductor package; and
a polymer bump formed on the first surface of the antenna PCB directly over the antenna, wherein the polymer bump is electrically insulating.
20. The semiconductor device of claim 19 , further including a shielding layer formed over the antenna PCB.
21. The semiconductor device of claim 19 , further including a shielding layer formed over the semiconductor package.
22. The semiconductor device of claim 19 , wherein the semiconductor package includes a double-sided SiP module.
23. The semiconductor device of claim 19 , wherein the polymer bump includes a high dielectric constant.