IP Library Patent Application 18060115
Patent Application
App. No. 18/060,115

Semiconductor Device and Method of Forming Dual-Sided Interconnect Structures in FO-WLCSP

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
18/060,115
Abstract

A semiconductor device has a substrate with first and second conductive layers formed over first and second opposing surfaces of the substrate. A plurality of bumps is formed over the substrate. A semiconductor die is mounted to the substrate between the bumps. An encapsulant is deposited over the substrate and semiconductor die. A portion of the bumps extends out from the encapsulant. A portion of the encapsulant is removed to expose the substrate. An interconnect structure is formed over the encapsulant and semiconductor die and electrically coupled to the bumps. A portion of the substrate can be removed to expose the first or second conductive layer. A portion of the substrate can be removed to expose the bumps. The substrate can be removed and a protection layer formed over the encapsulant and semiconductor die. A semiconductor package is disposed over the substrate and electrically connected to the substrate.

Claims (55)

1 . A method of making a semiconductor device, comprising:

providing a substrate including first and second conductive layers formed over first and second opposing surfaces of the substrate;

forming a plurality of bumps over the substrate;

mounting a semiconductor die to the substrate between the bumps;

depositing an encapsulant over the substrate and semiconductor die; and

forming an interconnect structure over the encapsulant and semiconductor die and electrically coupled to the bumps.

2 . The method of claim 1 , further including:

forming a first insulating layer over the first surface of the substrate and the first conductive layer; and

forming a second insulating layer over the second surface of the substrate and the second conductive layer.

3 . The method of claim 2 , further including removing a portion of the first insulating layer or second insulating layer by laser direct ablation.

4 . The method of claim 1 , further including removing a portion of the encapsulant to expose the substrate.

5 . The method of claim 1 , wherein a portion of the bumps extends out from the encapsulant.

6 . The method of claim 1 , further including disposing a semiconductor package over the substrate and electrically connected to the substrate.

7 . A method of making a semiconductor device, comprising:

providing a substrate;

forming a vertical interconnect structure over the substrate;

mounting a semiconductor die to the substrate;

depositing an encapsulant over the substrate and semiconductor die; and

forming a first interconnect structure over the encapsulant and semiconductor die.

8 . The method of claim 7 , wherein the substrate includes first and second conductive layers formed over first and second opposing surfaces of the substrate.

9 . The method of claim 8 , further including:

forming a first insulating layer over the first surface of the substrate and the first conductive layer; and

forming a second insulating layer over the second surface of the substrate and the second conductive layer.

10 . The method of claim 9 , further including removing a portion of the first insulating layer or second insulating layer by laser direct ablation.

11 . The method of claim 8 , further including removing a portion of the substrate to expose the first conductive layer or second conductive layer.

12 . The method of claim 7 , further including removing a portion of the substrate to expose the vertical interconnect structure.

13 . The method of claim 7 , further including:

removing the substrate;

forming a protection layer over the encapsulant and semiconductor die; and

removing a portion of the protection layer to expose the vertical interconnect structure.

14 . A semiconductor device, comprising:

a substrate;

a vertical interconnect structure formed over the substrate;

a semiconductor die mounted to the substrate;

an encapsulant deposited over the substrate and semiconductor die; and

a first interconnect structure formed over the encapsulant and semiconductor die.

15 . The semiconductor device of claim 14 , wherein the substrate includes first and second conductive layers formed over first and second opposing surfaces of the substrate.

16 . The semiconductor device of claim 15 , further including:

a first insulating layer formed over the first surface of the substrate and the first conductive layer; and

a second insulating layer formed over the second surface of the substrate and the second conductive layer.

17 . The semiconductor device of claim 14 , wherein a portion of the vertical interconnect structure extends out from the encapsulant.

18 . The semiconductor device of claim 14 , wherein the vertical interconnect structure includes a plurality of bumps.

19 . The semiconductor device of claim 14 , further including a semiconductor package disposed over the substrate and electrically connected to the substrate.

20 . A semiconductor device, comprising:

a substrate;

a semiconductor die mounted to the substrate;

an encapsulant deposited over the substrate and semiconductor die; and

a first interconnect structure formed over the encapsulant and semiconductor die.

21 . The semiconductor device of claim 20 , further including a vertical interconnect structure formed over the substrate.

22 . The semiconductor device of claim 21 , wherein the vertical interconnect structure includes a plurality of bumps.

23 . The semiconductor device of claim 20 , wherein the substrate includes first and second conductive layers formed over first and second opposing surfaces of the substrate.

24 . The semiconductor device of claim 23 , further including:

a first insulating layer formed over the first surface of the substrate and the first conductive layer; and

a second insulating layer formed over the second surface of the substrate and the second conductive layer.

25 . The semiconductor device of claim 20 , further including a semiconductor package disposed over the substrate and electrically connected to the substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2022
From: LIN, YAOJIAN; CHEN, KANG
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 061922/0077 →