IP Library Granted Patent US 11,862,572
Granted Patent B2
US 11,862,572 · App. 18/161,693 · Granted Jan 2, 2024

Laser-based redistribution and multi-stacked packages

Inventors: ChangOh Kim (Incheon, KR); KyoungHee Park (Seoul, KR); SeongHwan Park (Incheon, KR); JinHee Jung (Incheon, KR)
Assignee: STATS ChipPAC Pte. Ltd.
H01L23/552H01L21/486H01L21/56H01L23/31H01L23/66H01Q1/2283
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Quick Facts
Patent No.
US 11,862,572
App. No.
18/161,693
Granted
Jan 2, 2024
Kind
B2
Abstract

A semiconductor device has a first package layer. A first shielding layer is formed over the first package layer. The first shielding layer is patterned to form a redistribution layer. An electrical component is disposed over the redistribution layer. An encapsulant is deposited over the electrical component. A second shielding layer is formed over the encapsulant. The second shielding layer is patterned. The patterning of the first shielding layer and second shielding layer can be done with a laser. The second shielding layer can be patterned to form an antenna.

Claims (47)

1. A semiconductor device, comprising:

a first package layer;

a first shielding layer formed over the first package layer, wherein the first shielding layer is patterned to form a redistribution layer;

an electrical component disposed over the redistribution layer;

an encapsulant deposited over the electrical component; and

a second shielding layer formed over the encapsulant, wherein the second shielding layer is patterned.

2. The semiconductor device of claim 1 , wherein the second shielding layer is patterned to include an antenna.

3. The semiconductor device of claim 1 , further including a conductive via formed through the encapsulant, wherein the electrical component is coupled to the second shielding layer through the conductive via.

4. The semiconductor device of claim 1 , further including:

patterning the second shielding layer to include a contact pad; and

disposing a board-to-board (B2B) connector over the contact pad.

5. The semiconductor device of claim 1 , further including a patterned cavity formed in the encapsulant, wherein the second shielding layer is patterned to match the patterned cavity.

6. The semiconductor device of claim 1 , wherein the first shielding layer is patterned to include a contact pad.

7. A semiconductor device, comprising:

a first package layer;

a patterned cavity formed in the first package layer;

a first shielding layer formed over the first package layer, wherein the first shielding layer is patterned to form a redistribution layer matching the patterned cavity;

a second package layer formed over the first package layer and utilizing the redistribution layer; and

a second shielding layer formed over the second package layer, wherein the second shielding layer is patterned.

8. The semiconductor device of claim 7 , wherein the second shielding layer is patterned to include an antenna.

9. The semiconductor device of claim 7 , wherein the first package layer is coupled to the second package layer through the redistribution layer.

10. The semiconductor device of claim 7 , further including a board-to-board (B2B) connector disposed over the second shielding layer.

11. The semiconductor device of claim 7 , wherein the redistribution layer includes a ground plane.

12. The semiconductor device of claim 7 , wherein the first shielding layer is patterned to include a contact pad.

13. The semiconductor device of claim 12 , wherein the second package layer includes an electrical component mounted on the contact pad.

14. A semiconductor device, comprising:

a first package layer;

a shielding layer formed over the first package layer, wherein the shielding layer is patterned into a redistribution layer; and

an encapsulant deposited over the redistribution layer.

15. The semiconductor device of claim 14 , wherein the redistribution layer is embedded into the first package layer.

16. The semiconductor device of claim 14 , wherein the first shielding layer is patterned to form an antenna.

17. The semiconductor device of claim 14 , further including a second shielding layer formed over the encapsulant.

18. The semiconductor device of claim 17 , wherein the second shielding layer is patterned.

19. The semiconductor device of claim 14 , further including an electrical component mounted over the redistribution layer, wherein the encapsulant is deposited over the electrical component.

20. A semiconductor device, comprising:

a first package layer;

a redistribution layer formed over the first package layer;

a second package layer formed over the redistribution layer;

an antenna formed over the second package layer; and

a 5G transceiver disposed within the first package layer or second package layer, wherein the 5G transceiver is coupled to the antenna.

21. The semiconductor device of claim 20 , wherein the redistribution layer is embedded in the first package layer.

22. The semiconductor device of claim 20 , wherein the antenna is embedded in the second package layer.

23. The semiconductor device of claim 20 , further including a conductive via formed through the first package layer to couple the first package layer to the redistribution layer.

24. The semiconductor device of claim 20 , further including:

a first shielding layer formed around the first package layer; and

a second shielding layer formed around the first shielding layer and first package layer.

25. The semiconductor device of claim 24 , wherein the second shielding layer is formed over the second package layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2023
From: KIM, CHANGOH; PARK, SEONGHWAN; PARK, KYOUNGHEE; JUNG, JINHEE
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 062536/0359 →
Continuity (2)
Division 17314916 · May 7, 2021
Related Publication 20230170311A1 · Jun 1, 2023
Cited By (1)
US 12,261,127