Flexible printed circuit finger layout for low crosstalk
A flexible printed circuit (FPC) for a hard disk drive includes a plurality of electrical traces, whereby aggressor traces are isolated from victim traces to avoid crosstalk that could degrade signals. Aggressor traces may be positioned together at one of the edges of each of the top wiring layer and the bottom wiring layer, physically isolated from victim traces. Aggressor traces may be grouped together at either the top wiring layer or the bottom wiring layer, with the victim traces positioned on the layer opposing the aggressor traces. With aggressor and victim traces routed on the same wiring layer, aggressor traces may be routed away from the victim traces with multi-layer routing, by way of vias.
1 . A flexible printed circuit (FPC) for a hard disk drive, the FPC having a top wiring layer having opposing lateral edges extending longitudinally, a bottom wiring layer having opposing lateral edges extending longitudinally, and a proximal end in the direction of a preamp, the FPC comprising:
a plurality of electrical traces comprising:
two pairs of aggressor traces, configured to carry signals that can interfere with signals carried by victim traces, grouped together at one lateral edge of the proximal end of either the top wiring layer or the bottom wiring layer; and
the victim traces positioned on the same top wiring layer or bottom wiring layer as the aggressor traces;
wherein at least one pair of the aggressor traces is routed away from the victim traces, by way of first vias, to the top wiring layer or the bottom wiring layer opposing the layer at which the aggressor traces are grouped at the one lateral edge of the proximal end.
2 . The FPC of claim 1 , wherein the at least one pair of the aggressor traces is routed, by way of second vias, back to the top wiring layer or the bottom wiring layer at which the aggressor traces are grouped at the one lateral edge of the proximal end.
3 . The FPC of claim 1 , wherein the aggressor traces are positioned adjacently at the one lateral edge of the proximal end.
4 . The FPC of claim 1 , wherein:
the aggressor traces are configured to carry write signals; and
the victim traces are configured to carry read signals.
5 . The FPC of claim 1 , wherein the aggressor traces are grouped together at the proximal end of the top wiring layer, the FPC further comprising:
a ground plane positioned at the proximal end of the bottom wiring layer.
6 . The FPC of claim 1 , wherein the aggressor traces are grouped together at the proximal end of the bottom wiring layer, the FPC further comprising:
a ground plane positioned at the proximal end of the top wiring layer.
7 . A hard disk drive comprising the FPC of claim 1 .
8 . A method of manufacturing a flexible printed circuit (FPC) having a top wiring layer having opposing lateral edges extending longitudinally, a bottom wiring layer having opposing lateral edges extending longitudinally, and a proximal end in the direction of a preamp, the method comprising:
forming a plurality of electrical traces comprising:
forming two pairs of aggressor traces, configured to carry signals that can interfere with signals carried by victim traces, grouped together at one lateral edge of the proximal end of either the top wiring layer or the bottom wiring layer; and
forming the victim traces positioned on the same top wiring layer or bottom wiring layer as the aggressor traces;
wherein forming the aggressor traces includes routing at least one pair of the aggressor traces away from the victim traces, including forming first vias through which the at least one pair is routed away from the victim traces, to the top wiring layer or the bottom wiring layer opposing the layer at which the aggressor traces are grouped at the one lateral edge of the proximal end.
9 . The method of claim 8 , wherein forming the aggressor traces includes routing the at least one pair, including forming second vias through which the at least one pair is routed back to the top wiring layer or the bottom wiring layer at which the aggressor traces are grouped at the one lateral edge of the proximal end.
10 . The method of claim 8 , wherein forming the aggressor traces includes forming the aggressor traces positioned adjacently at the one lateral edge of the proximal end.
11 . The method of claim 8 , wherein:
forming the aggressor traces includes configuring the aggressor traces to carry write signals; and
forming the victim traces includes configuring the victim traces to carry read signals.
12 . The method of claim 8 , wherein forming the aggressor traces includes grouping the aggressor traces together at the proximal end of the top wiring layer, the method further comprising:
forming a ground plane positioned at the proximal end of the bottom wiring layer.
13 . The method of claim 8 , wherein forming the aggressor traces includes grouping the aggressor traces together at the proximal end of the bottom wiring layer, the method further comprising:
forming a ground plane positioned at the proximal end of the top wiring layer.
14 . The FPC of claim 1 , wherein the aggressor traces are configured to carry write signals.
15 . The FPC of claim 5 , wherein the at least one pair of the aggressor traces is routed away from the victim traces by way of the first vias to the bottom wiring layer.
16 . The FPC of claim 6 , wherein the at least one pair of the aggressor traces is routed away from the victim traces by way of the first vias to the top wiring layer.
17 . The method of claim 8 , wherein forming the aggressor traces includes configuring the aggressor traces to carry write signals.
18 . The method of claim 12 , wherein the at least one pair of the aggressor traces is routed away from the victim traces by way of the first vias to the bottom wiring layer.
19 . The method of claim 13 , wherein the at least one pair of the aggressor traces is routed away from the victim traces by way of the first vias to the top wiring layer.