IP Library Assignment 006468/0103
Patent Assignment
Reel/Frame 006468/0103

Assignment of Assignors Interest.

Recorded: 1993-02-24 Pages: 3
Assignors
SHIN, DAITEI
Executed: 1993-02-17
HARADA, HIDEKI
Executed: 1993-02-17
Assignees
FUJITSU LIMITED
1015, KAMIKODANAKA, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA, 211, JAPAN
KYUSHU FUJITSU ELECTRONICS LIMITED
5950, SOEDA, IRIKI-CHO, SATSUMA-GUN, KAGOSHIMA 895-14, JAPAN
Covered Property (1)
Process for Fabricating an Integrated Circuit Device by Forming a Planarized Polysilazane Layer and Oxidizing to Form Oxide Layer
Patent: 5,310,720 →
Application: 08/021,573 →
Related Assignments (5)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignors Interest. Feb 24, 1993
From: MAUCHER, PAUL
To: LUK LAMELLEN UND KUPPLUNGSBAU GMBH
Reel/Frame 006471/0997 →
Assignment of Assignor's Interest Feb 13, 2009
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 022248/0521 →
Change of Name Aug 4, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024785/0608 →
Merger Jul 23, 2013
From: KYUSHU FUJITSU ELECTRONICS LTD.
To: FUJITSU INTEGRATED MICROTECHNOLOGY LTD.
Reel/Frame 030872/0593 →
Assignment of Assignor's Interest Aug 13, 2013
From: FUJITSU INTEGRATED MICROTECHNOLOGY LTD.
To: FUJITSU SEMICONDUCTOR LTD.
Reel/Frame 031001/0558 →