Patent Assignment
Reel/Frame 010029/0650
Corrective Assignment to Correct the Assignee Address. Filed on 10-08-1998 Recorded on Reel 9511, Frame 0635 the Assignment of the Entire Interest.
Recorded: 1999-04-29
Pages: 6
Assignor
SAWADA, SHIGEKI
Executed: 1998-09-28
Assignee
MATSUSHITA ELECTRONICS CORPORATION
1-1, SAIWAI-CHO, TAKATSUKI-SHI, OSAKA, 569-1, JAPAN
Covered Property
(1)
Method of Fabricating a Bi-Cmos Ic Device Including a Self-Alignment Bipolar Transistor Capable of High Speed Operation
Patent:
6,156,595 →
Application:
09/168,518 →
Related Assignments
(2)
Other recorded transfers of the patent in this record — the chain of ownership.