IP Library › Assignment 011578/0958
Patent Assignment
Reel/Frame 011578/0958

Assignment of Assignor's Interest

Recorded: 2001-02-13 Pages: 2
Assignors
OOISHI, TSUKASA
Executed: 2001-01-29
TANIZAKI, HIROAKI
Executed: 2001-01-29
Assignees
MITSUBISHI DENKI KABUSHIKI KAISHA
2-3, MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO 100-8310, JAPAN
MITSUBISHI ELECTRIC ENGINEERING COMPANY LIMITED
6-2, OOTEMACHI 2-CHOME, CHIYODA-KU, TOKYO 100-0004, JAPAN
Covered Property (1)
Semiconductor Memory Device Including Plurality of Global Data Lines in Parallel Arrangement with Low Parasitic Capacitance, and Fabrication Method Thereof
Patent: 6,381,167 →
Application: 09/781,238 →
Publication: US 2001/0052599
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Mar 18, 2011
From: MITSUBISHI DENKI KABUSHIKI KAISHA
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025980/0219 →
Assignment of Assignor's Interest Aug 24, 2017
From: MITSUBISHI ELECTRIC ENGINEERING CO., LTD.
To: RENESAS SYSTEM DESIGN CO., LTD.
Reel/Frame 043668/0291 →
Merger Nov 28, 2017
From: RENESAS SYSTEM DESIGN CO., LTD.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044921/0873 →
Change of Address Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →