IP Library Assignment 012316/0057
Patent Assignment
Reel/Frame 012316/0057

Assignment of Assignor's Interest

Recorded: 2001-11-14 Pages: 3
Assignors
YAMAMOTO, YU
Executed: 2001-11-01
INOUE, YOSHIO
Executed: 2001-11-01
Assignee
MITSUBISHI DENKI KABUSHIKI KAISHA
2-3, MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO, 100-8, JAPAN
Covered Property (1)
Method of Designing Logic Circuit, and Computer Product
Patent: 6,654,939 →
Application: 09/987,276 →
Publication: US 2002/0199161
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 10, 2003
From: MITSUBISHI DENKI KABUSHIKI KAISHA
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 014502/0289 →
Assignment of Assignor's Interest Apr 7, 2004
From: MITSUBISHI DENKI KABUSHIKI KAISHA
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 015185/0122 →
Change of Name Sep 8, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024953/0211 →