Patent Assignment
Reel/Frame 013064/0039
Assignment of Assignor's Interest
Recorded: 2002-06-28
Received: 2002-07-12
Pages: 3
Assignee
FUJI JUKOGYO KABUSHIKI KAISHA
SHINJUKU-KU, 7-2 NISHISHINJUKU 1-CHOME, TOKYO, JPX, JAPAN
Covered Properties
(3)
Method of Fabricating an Integral Capacitor and Gate Transistor Having Nitride and Oxide Polish Stop Layers Using Chemical Mechanical Polishing Elimination
Application:
10/185,537 →
Control Device for Automatic Transmission
Application:
10/183,604 →
High Speed Add-Compare-Select Operations for Use in Viterbi Decoders
Application:
10/028,453 →