IP Library Assignment 015451/0886
Patent Assignment
Reel/Frame 015451/0886

Assignment of Assignor's Interest

Recorded: 2004-06-10 Received: 2004-06-16 Pages: 3
Assignor
MITSUBISHI DENKI KABUSHIKI KAISHA
Executed: 2003-09-08
Assignee
RENESAS TECHNOLOGY CORP.
4-1, MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO, JPX, 100-6334, JAPAN
Covered Properties (24)
Semiconductor Integrated Circuit Device Operating with Low Power Consumption
Application: 10/680,397 →
Thin Film Magnetic Memory Device Having Data Read Current Tuning Function
Application: 10/663,674 →
Semiconductor Device and Method of Manufacturing the Same
Application: 10/657,068 →
Mis Semiconductor Device Having Improved Gate Insulating Film Reliability
Application: 10/644,750 →
Semiconductor Device Capable of Shortening Test Time and Suppressing Increase in Chip Area, and Method of Manufacturing Semiconductor Integrated Circuit Device
Application: 10/640,322 →
Trace Control Circuit Adapted for High-Speed Microcomputer Operation
Application: 10/639,582 →
method of manufacturing a semiconductor device with capacitor electrodes
Application: 10/633,576 →
Semiconductor integrated circuit device
Application: 10/632,831 →
Semiconductor Circuit Device Having Hierarchical Power Supply Structure
Application: 10/628,384 →
Thin Film Magnetic Memory Device with Memory Cells Including a Tunnel Magnetic Resistive Element
Application: 10/622,473 →
Thin Film Magnetic Memory Device Having a Highly Integrated Memory Array
Application: 10/615,379 →
Semiconductor Device with Reduced Current Consumption in Standby State
Application: 10/607,259 →
Semiconductor Device and Manufacturing Method Thereof, and Registration Accuracy Measurement Enhancement Method
Application: 10/603,738 →
Semiconductor Device Using an Soi Substrate
Application: 10/600,650 →
Method for depositing sputtered film
Application: 10/460,173 →
Semiconductor Memory Device Having a Circuit for Fast Operation
Application: 10/443,775 →
Semiconductor integrated circuit
Application: 10/430,276 →
Semiconductor Memory Device Including an Soi Substrate
Application: 10/421,928 →
Multiport Memory Circuit Composed of 1TR-1C Memory Cells
Application: 10/408,237 →
Thin-Film Magnetic Memory Device Suppressing Parasitic Capacitance Applied to Data Line or the Like
Application: 10/397,352 →
Semiconductor intellectual property transmission system
Application: 10/387,490 →
Semiconductor Integrated Circuit Device Having a Test Circuit of a Random Access Memory
Application: 10/383,553 →
Cache Memory for Invalidating Data or Writing Back Data to a Main Memory
Application: 10/383,520 →
Delay Time Calculation Apparatus and Integrated Circuit Design Apparatus
Application: 10/383,522 →