IP Library Assignment 015837/0296
Patent Assignment
Reel/Frame 015837/0296

Assignment of Assignor's Interest

Recorded: 2005-03-30 Pages: 3
Assignors
KAO, CHIN-LI
Executed: 2004-08-05
LAI, YI-SHAO
Executed: 2004-08-06
WU, JENG-DA
Executed: 2004-08-09
WANG, TONG-HONG
Executed: 2004-08-05
Assignee
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
26, CHIN 3RD. RD., 811, NANTZE EXPORT PROCESSING ZONE, KAOHSIUNG, TAIWAN
Covered Property (1)
Chip Package Structure and Chip Packaging Process
Patent: 7,335,982 →
Application: 10/907,340 →
Publication: US 2005/0224956