IP Library Assignment 015947/0401
Patent Assignment
Reel/Frame 015947/0401

Assignment of Assignor's Interest

Recorded: 2004-10-29 Pages: 4
Assignors
HORCH, ANDREW
Executed: 2002-07-31
ROBINS, SCOTT
Executed: 2002-07-31
Assignee
T-RAM, INC.
100 HEADQUARTERS DRIVE, SAN JOSE, CALIFORNIA, 95134-1370
Covered Property (1)
Single Data Line Sensing Scheme for Tcct-Based Memory Cells
Patent: 7,006,398 →
Application: 10/977,309 →
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement Aug 7, 2008
From: T-RAM SEMICONDUCTOR INCORPORATED
To: SILICON VALLEY BANK
Reel/Frame 021354/0186 →
Release May 18, 2010
From: SILICON VALLEY BANK
To: T RAM SEMICONDUCTOR INCORPORATED
Reel/Frame 024492/0651 →
Purchase Option Agreement Jun 3, 2010
From: T-RAM SEMICONDUCTOR, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 024474/0979 →
Assignment of Assignor's Interest Nov 21, 2013
From: T-RAM SEMICONDUCTOR, INC.
To: T-RAM (ASSIGNMENT FOR THE BENEFIT OF CREDITORS), LLC
Reel/Frame 031694/0018 →