IP Library Assignment 016087/0932
Patent Assignment
Reel/Frame 016087/0932

Security Agreement

Recorded: 2005-06-06 Received: 2005-06-06 Pages: 7
Assignor
Assignee
SOLUTIA GERMANY GMBH & CO. KG
BOELCKESTRASSE 26, MAIANZ-KASTEL, DEX, D-55252, GERMANY
Covered Properties (14)
Vectorless Instantaneous Current Estimation
Application: 10/926,660 →
Current Scheduling System and Method for Optimizing Multi-Threshold Cmos Designs
Application: 10/739,659 →
Circuit Optimization for Minimum Path Timing Violations
Application: 10/627,933 →
Rtl Power Analysis Using Gate-Level Cell Power Models
Application: 10/447,076 →
Method and Apparatus for Interconnect-Driven Optimization of Integrated Circuit Design
Application: 10/387,644 →
Vectorless Instantaneous Current Estimation
Application: 10/262,914 →
Method and System for Extraction of Parasitic Interconnect Impedance Including Inductance
Application: 10/057,165 →
Method for Match Delay Buffer Insertion
Application: 10/022,743 →
Method for Balanced-Delay Clock Tree Insertion
Application: 10/023,329 →
Method for Optimal Driver Selection
Application: 10/022,747 →
Method for Determining a Zero-Skew Buffer Insertion Point
Application: 10/022,751 →
Circuit Optimization for Minimum Path Timing Violations
Application: 10/008,458 →
Water-Dilutable Etherified Melamine-Formaldehyde Resins
Application: 10/016,095 →
Rtl Power Analysis Using Gate-Level Cell Power Models
Application: 09/798,016 →