IP Library Assignment 016484/0410
Patent Assignment
Reel/Frame 016484/0410

Assignment of Assignor's Interest

Recorded: 2005-04-21 Pages: 3
Assignor
DEWAN, HITANSHU
Executed: 2005-01-10
Assignee
STMICROELECTRONICS PVT. LTD.
PLOT NO. 2 & 3, SECTOR 16A, INSTITUTIONAL AREA, NOIDA - 201 3001, UTTAR PRADESH, INDIA
Covered Property (1)
An Improved System for Delay Reduction During Technology Mapping in Fpga
Patent: 7,430,726 →
Application: 11/027,292 →
Publication: US 2005/0177808
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 17, 2008
From: STMICROELECTRONICS PVT, LTD.
To: STMICROELECTRONICS NV
Reel/Frame 020385/0574 →
Assignment of Assignor's Interest Jan 17, 2008
From: STMICROELECTRONICS N.V.
To: SICRONIC REMOTE KG, LLC
Reel/Frame 020385/0581 →
Merger Nov 2, 2015
From: SICRONIC REMOTE KG, LLC
To: MINERAL LASSEN LLC
Reel/Frame 036940/0693 →