IP Library Assignment 016676/0817
Patent Assignment
Reel/Frame 016676/0817

Assignment of Assignor's Interest

Recorded: 2005-06-07 Pages: 5
Assignors
KENGERI, SUBRAMANI
Executed: 2005-06-03
SABHARWAL, DEEPAK
Executed: 2005-06-03
BHATIA, PRAKASH
Executed: 2005-06-03
SAMPIGETHAYA, SHREEKANTH
Executed: 2005-06-03
KAINTH, SANJIV
Executed: 2005-06-03
Assignee
VIRAGE LOGIC CORPORATION
47100 BAYSIDE PARKWAY, FREMONT, CALIFORNIA, 94538
Covered Property (1)
Multi-Port Memory Utilizing an Array of Single-Port Memory Cells
Patent: 7,251,186 →
Application: 11/147,928 →
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Oct 8, 2010
From: VIRAGE LOGIC CORPORATION; VL C.V.; ARC CORES LIMITED; ARC INTERNATIONAL I.P., INC.
To: SYNOPSYS, INC.
Reel/Frame 025105/0907 →