IP Library Assignment 017081/0852
Patent Assignment
Reel/Frame 017081/0852

Assignment of Assignor's Interest

Recorded: 2005-12-01 Pages: 3
Assignor
OGASAWARA, KAZUO
Executed: 2005-08-19
Assignee
NEC ELECTRONICS CORPORATION
1753 SHIMONUMABE, NAKAHARA-KU, KAWASAKI, KANAGAWA, 211-8668, JAPAN
Covered Property (1)
Clock Buffer Circuit Having Predetermined Gain with Bias Circuit Thereof
Patent: 7,298,201 →
Application: 11/210,757 →
Publication: US 2006/0055444
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Change of Name Nov 11, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025346/0886 →
Change of Address Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →