Patent Assignment
Reel/Frame 017689/0847
Assignment of Assignor's Interest
Recorded: 2006-03-27
Pages: 3
Assignor
LUIS, BRAD
Executed: 2006-03-21
Assignee
INTEGRATED DEVICE TECHNOLOGY, INC.
6024 SILVER CREEK VALLEY RD., SAN JOSE, CALIFORNIA, 95138
Covered Property
(1)
Core Clock Alignment Circuits That Utilize Clock Phase Learning Operations to Achieve Accurate Clocking of Data Derived from Serial Data Streams Having Different Relative Skews
Patent:
7,571,267 →
Application:
11/389,748 →
Related Assignments
(2)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement
Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Release of Security Interest
Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →