IP Library › Assignment 018491/0659
Patent Assignment
Reel/Frame 018491/0659

Assignment of Assignor's Interest

Recorded: 2006-11-07 Pages: 4
Assignor
BUELL, BRIAN J.
Executed: 2006-11-01
Assignee
INTEGRATED DEVICE TECHNOLOGY, INC.
6024 SILVER CREEK VALLEY ROAD, SAN JOSE, CALIFORNIA, 95138
Covered Property (1)
Low Power Logic Output Buffer
Patent: 7,564,268 →
Application: 11/557,320 →
Publication: US 2008/0122487
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Release of Security Interest Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →