IP Library Assignment 018955/0242
Patent Assignment
Reel/Frame 018955/0242

Assignment of Assignor's Interest

Recorded: 2007-03-02 Pages: 2
Assignors
JUAN, STEVE
Executed: 2007-02-27
WANG, CHI-LIE
Executed: 2007-02-27
CHEN, MING-SHIUNG
Executed: 2007-02-27
Assignee
INTEGRATED DEVICE TECHNOLOGY, INC.
6024 SILVER CREEK VALLEY ROAD, MAIL STOP B-165, SAN JOSE, CALIFORNIA, 95138
Covered Property (1)
Multi-Bus Structure for Optimizing System Performance of a Serial Buffer
Patent: 8,094,677 →
Application: 11/679,824 →
Publication: US 2008/0205438
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Release of Security Interest Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →
Merger Apr 15, 2025
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: RENESAS ELECTRONICS AMERICA INC.
Reel/Frame 070851/0391 →
Assignment of Assignor's Interest Apr 16, 2025
From: RENESAS ELECTRONICS AMERICA INC.
To: AXIRO SEMICONDUCTOR INC.
Reel/Frame 070864/0142 →