Patent Assignment
Reel/Frame 019022/0462
Assignment of Assignor's Interest
Recorded: 2007-03-07
Pages: 2
Assignors
TERASAWA, TSUNEO
Executed: 2002-10-07
TANAKA, TOSHIHIKO
Executed: 2002-10-11
MIYAZAKI, KO
Executed: 2002-10-22
HASEGAWA, NORIO
Executed: 2002-10-11
MORI, KAZUTAKA
Executed: 2002-10-16
Assignee
HITACHI, LTD.
6-6, MARUNOUCHI 1-CHOME, CHIYODA-KU, TOKYO, JAPAN
Covered Property
(1)
Method of Fabricating a Semiconductor Integrated Circuit That Includes Patterning a Semiconductor Substrate with a First Photomask That Uses Metal for Blocking Light and Patterning the Same Substrate with a Second Photomask That Uses Organic Resin for Blocking Ligh
Related Assignments
(3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest
Mar 7, 2007
From: HITACHI, LTD.
To: RENESAS TECHNOLOGY CORPORATION
Reel/Frame 019022/0494 →
Merger
Sep 10, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024982/0148 →
Change of Address
Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →