IP Library Assignment 019468/0792
Patent Assignment
Reel/Frame 019468/0792

Assignment of Assignor's Interest

Recorded: 2007-06-22 Pages: 9
Assignors
DARBINYAN, KAREN
Executed: 2007-06-20
TORJYAN, GEVORG
Executed: 2007-06-20
ZORIAN, YERVANT
Executed: 2007-06-21
MKHOYAN, MHER
Executed: 2007-06-21
Assignee
VIRAGE LOGIC CORP.
47100 BAYSIDE PARKWAY, FREMONT, CALIFORNIA, 94538
Covered Property (1)
Architecture, System and Method for Compressing Repair Data in an Integrated Circuit (Ic) Design
Patent: 7,898,882 →
Application: 11/766,943 →
Publication: US 2008/0008015
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Oct 8, 2010
From: VIRAGE LOGIC CORPORATION; VL C.V.; ARC CORES LIMITED; ARC INTERNATIONAL I.P., INC.
To: SYNOPSYS, INC.
Reel/Frame 025105/0907 →