Assignment of Assignor's Interest

Recorded: 2007-08-06 Pages: 4

Assignor

S-MOS SYSTEMS, INC.

Executed: 1995-04-24

Assignee

SEIKO EPSON CORPORATION

4-1 NISHISHINJUKU 2-CHOME, SHINJUKU-KU TOKYO-TO, JAPAN

Covered Properties (8)

Clock Generator with Programmable Non-Overlapping-Clock-Edge-Capability

Application: 08/478,534 →

Method for Manufacturing an Integrated Circuit with Programmable Non-Overlapping-Clock-Edge Capability

Patent: 5,966,037 →

Application: 08/795,363 →

Integrated Circuit with Hardware-Based Programmable Non-Overlapping-Clock-Edge Capability

Patent: 6,163,194 →

Application: 09/376,186 →

Clock Generator with Programmable Non-Overlapping-Clock-Edge- Capability

Patent: 6,323,711 →

Application: 09/726,035 →

Publication: US 2001/0000018

Clock Generator with Programmable Non-Overlapping-Clock-Edge Capability

Patent: 6,489,826 →

Application: 09/970,773 →

Publication: US 2002/0017938

Clock Generator with Programmable Non-Overlapping-Clock-Edge Capability

Patent: 6,653,881 →

Application: 10/277,757 →

Publication: US 2003/0058018

Clock Generator with Programmable Non-Overlapping-Clock-Edge Capability

Patent: 6,900,682 →

Application: 10/669,659 →

Publication: US 2004/0056699

Clock Generator with Programmable Non-Overlapping-Clock-Edge Capability

Patent: 7,352,222 →

Application: 11/111,799 →

Publication: US 2005/0189978

Related Assignments (2)

Other recorded transfers of the patents in this record — the chain of ownership.