Patent Assignment
Reel/Frame 020334/0908
Assignment of Assignor's Interest
Recorded: 2007-12-19
Pages: 3
Assignors
WANG, YONG
Executed: 2007-12-18
ZHANG, LIANG
Executed: 2007-12-18
LIU, XIN
Executed: 2007-12-18
Assignee
INTEGRATED DEVICE TECHNOLOGY, INC.
6024 SILVER CREEK VALLEY ROAD, SAN JOSE, CALIFORNIA, 95138
Covered Property
(1)
Systems and Methods for Clean Dqs Signal Generation in Source-Synchronous DDR2 Interface Design
Related Assignments
(2)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest
Jul 6, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: SK HYNIX INC.
Reel/Frame 042922/0851 →
Release of Security Interest
Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →