Assignment of Assignor's Interest

Recorded: 2008-07-15 Pages: 3

Assignor

UEKI, TAKESHI

Executed: 2008-07-08

Assignee

NEC ELECTRONICS CORPORATION

1753 SHIMONUMABE, NAKAHARA-KU, KAWASAKI, KANAGAWA, 211-8668, JAPAN

Covered Property (1)

Layout correcting method for semiconductor integrated circuit and layout correcting device for semiconductor integrated circuit

Application: 12/219,021 →

Publication: US 2009/0031267

Related Assignments (1)

Other recorded transfers of the patent in this record — the chain of ownership.