Patent Assignment
Reel/Frame 021500/0678
Assignment of Assignor's Interest
Recorded: 2008-09-09
Pages: 2
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KANAGAWA, KAWASAKI-SHI, 211-8588, JAPAN
Covered Property
(1)
Debugging Mechanism Having an or Circuit for Triggering Storage of Arithmetic Operation Data Whenever a Valid Control Signal Is Received or a Clock-Based Counter Overflows