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PC-based computing system employing a silicon chip with a routing unit to distribute geometrical data and graphics commands to multiple GPU-driven pipeline cores during a mode of parallel operation

PC-based computing system employing parallelized GPU-driven pipeline cores integrated with a routing unit and control unit on a silicon chip of monolithic construction

Method of routing geometrical data, graphics commands, and pixel data within a PC-based computing system employing a silicon chip having a routing unit and a control unit for parallelizing multiple GPU-driven pipeline cores during a graphics application

Silicon chip of monolithic construction for integration in a PC-based computing system and having multiple GPU-driven pipeline cores supporting multiple modes of parallelization dynamically controlled while running a graphics application

Pc-Based Computing System Employing a Silicon Chip Implementing Parallelized Gpu-Driven Pipelines Cores Supporting Multiple Modes of Parallelization Dynamically Controlled While Running a Graphics Application

Pc-Based Computing System Employing a Silicon Chip of Monolithic Construction Having a Routing Unit, a Control Unit and a Profiling Unit for Parallelizing the Operation of Multiple Gpu-Driven Pipeline Cores According to the Object Division Mode of Parallel Operatio