IP Library Assignment 023428/0519
Patent Assignment
Reel/Frame 023428/0519

Assignment of Assignor's Interest

Recorded: 2009-10-27 Pages: 2
Assignors
NAKAI, KATSUHIKO
Executed: 2009-09-01
FUKUDA, MASAYUKI
Executed: 2009-09-01
Assignee
SILTRONIC AG
HANNS-SEIDEL-PLATZ 4, MUNICH, 81737, GERMANY
Covered Property (1)
Process for the Preparation of Silicon Wafer with Reduced Slip and Warpage
Patent: 8,382,894 →
Application: 12/605,926 →
Publication: US 2010/0047563
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Change of Address Jun 30, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 056719/0881 →
Corrective Assignment to Correct the Date of the Change of Address from 03/12/2020 to 12/03/2020 Previously Recorded at Reel: 056719 Frame: 0881. Assignor(S) Hereby Confirms the Assignment. Jul 1, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 057561/0451 →