IP Library Assignment 024034/0962
Patent Assignment
Reel/Frame 024034/0962

Assignment of Assignor's Interest

Recorded: 2010-03-05 Pages: 5
Assignor
INVARIUM, INC.
Executed: 2008-06-04
Assignee
CADENCE DESIGN SYSTEMS, INC.
2655 SEELY AVENUE, BLDG. 5, SAN JOSE, CALIFORNIA, 95134
Covered Property (1)
Method and System for Semiconductor Design Hierarchy Analysis and Transformation
Patent: 9,038,002 →
Application: 12/640,960 →
Publication: US 2010/0153894
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Mar 3, 2010
From: KAMAT, VISHNU GOVIND
To: INVARIUM, INC.
Reel/Frame 024025/0135 →
Assignment of Assignor's Interest Mar 14, 2025
From: CADENCE DESIGN SYSTEMS, INC.
To: SILVACO, INC.
Reel/Frame 070519/0972 →