Assignment of Assignor's Interest

Recorded: 2010-07-23 Pages: 3

Assignor

KOZAWA, YUKIO

Executed: 2010-07-13

Assignee

RENESAS ELECTRONICS CORPORATION

1753 SHIMONUMABE, NAKAHARA-KU, KAWASAKI, KANAGAWA, 211-8668, JAPAN

Covered Property (1)

Semiconductor Integrated Circuit and Layout Method Thereof

Application: 12/841,428 →

Publication: US 2011/0025378

Related Assignments (1)

Other recorded transfers of the patent in this record — the chain of ownership.